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Convert CONFIG_CMD_BSP to Kconfig
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1 /*
2 *
3 * Configuration settings for the Armadeus Project motherboard APF27
4 *
5 * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12
13 #define CONFIG_ENV_VERSION 10
14 #define CONFIG_BOARD_NAME apf27
15
16 /*
17 * SoC configurations
18 */
19 #define CONFIG_MX27 /* This is a Freescale i.MX27 Chip */
20 #define CONFIG_MACH_TYPE 1698 /* APF27 */
21
22 /*
23 * Enable the call to miscellaneous platform dependent initialization.
24 */
25
26 /*
27 * SPL
28 */
29 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
30 #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
31 #define CONFIG_SPL_MAX_SIZE 2048
32 #define CONFIG_SPL_TEXT_BASE 0xA0000000
33
34 /* NAND boot config */
35 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
36 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800
37 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
38 #define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN - 0x800
39
40 /*
41 * BOOTP options
42 */
43 #define CONFIG_BOOTP_SUBNETMASK
44 #define CONFIG_BOOTP_GATEWAY
45 #define CONFIG_BOOTP_HOSTNAME
46 #define CONFIG_BOOTP_BOOTPATH
47 #define CONFIG_BOOTP_BOOTFILESIZE
48 #define CONFIG_BOOTP_DNS
49 #define CONFIG_BOOTP_DNS2
50
51 #define CONFIG_HOSTNAME CONFIG_BOARD_NAME
52 #define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
53
54 /*
55 * U-Boot Commands
56 */
57 #define CONFIG_CMD_DATE
58 #define CONFIG_CMD_EEPROM
59 #define CONFIG_CMD_IMX_FUSE /* imx iim fuse */
60 #define CONFIG_CMD_MTDPARTS /* MTD partition support */
61 #define CONFIG_CMD_NAND /* NAND support */
62 #define CONFIG_CMD_NAND_LOCK_UNLOCK
63 #define CONFIG_CMD_NAND_TRIMFFS
64 #define CONFIG_CMD_UBIFS
65
66 /*
67 * Memory configurations
68 */
69 #define CONFIG_NR_DRAM_POPULATED 1
70 #define CONFIG_NR_DRAM_BANKS 2
71
72 #define ACFG_SDRAM_MBYTE_SYZE 64
73
74 #define PHYS_SDRAM_1 0xA0000000
75 #define PHYS_SDRAM_2 0xB0000000
76 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
77 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (512<<10))
78 #define CONFIG_SYS_MEMTEST_START 0xA0000000 /* memtest test area */
79 #define CONFIG_SYS_MEMTEST_END 0xA0300000 /* 3 MiB RAM test */
80
81 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE \
82 + PHYS_SDRAM_1_SIZE - 0x0100000)
83
84 #define CONFIG_SYS_TEXT_BASE 0xA0000800
85
86 /*
87 * FLASH organization
88 */
89 #define ACFG_MONITOR_OFFSET 0x00000000
90 #define CONFIG_SYS_MONITOR_LEN 0x00100000 /* 1MiB */
91 #define CONFIG_ENV_IS_IN_NAND
92 #define CONFIG_ENV_OVERWRITE
93 #define CONFIG_ENV_OFFSET 0x00100000 /* NAND offset */
94 #define CONFIG_ENV_SIZE 0x00020000 /* 128kB */
95 #define CONFIG_ENV_RANGE 0X00080000 /* 512kB */
96 #define CONFIG_ENV_OFFSET_REDUND \
97 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) /* +512kB */
98 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE /* 512kB */
99 #define CONFIG_FIRMWARE_OFFSET 0x00200000
100 #define CONFIG_FIRMWARE_SIZE 0x00080000 /* 512kB */
101 #define CONFIG_KERNEL_OFFSET 0x00300000
102 #define CONFIG_ROOTFS_OFFSET 0x00800000
103
104 #define CONFIG_MTDMAP "mxc_nand.0"
105 #define MTDIDS_DEFAULT "nand0=" CONFIG_MTDMAP
106 #define MTDPARTS_DEFAULT "mtdparts=" CONFIG_MTDMAP \
107 ":1M(u-boot)ro," \
108 "512K(env)," \
109 "512K(env2)," \
110 "512K(firmware)," \
111 "512K(dtb)," \
112 "5M(kernel)," \
113 "-(rootfs)"
114
115 /*
116 * U-Boot general configurations
117 */
118 #define CONFIG_SYS_LONGHELP
119 #define CONFIG_SYS_CBSIZE 2048 /* console I/O buffer */
120 #define CONFIG_SYS_PBSIZE \
121 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
122 /* Print buffer size */
123 #define CONFIG_SYS_MAXARGS 16 /* max command args */
124 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
125 /* Boot argument buffer size */
126 #define CONFIG_AUTO_COMPLETE
127 #define CONFIG_CMDLINE_EDITING
128 #define CONFIG_ENV_VARS_UBOOT_CONFIG
129 #define CONFIG_PREBOOT "run check_flash check_env;"
130
131 /*
132 * Boot Linux
133 */
134 #define CONFIG_CMDLINE_TAG /* send commandline to Kernel */
135 #define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */
136 #define CONFIG_INITRD_TAG /* send initrd params */
137
138 #define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin"
139 #define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," \
140 __stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \
141 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs "
142
143 #define ACFG_CONSOLE_DEV ttySMX0
144 #define CONFIG_BOOTCOMMAND "run ubifsboot"
145 #define CONFIG_SYS_AUTOLOAD "no"
146 /*
147 * Default load address for user programs and kernel
148 */
149 #define CONFIG_LOADADDR 0xA0000000
150 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
151
152 /*
153 * Extra Environments
154 */
155 #define CONFIG_EXTRA_ENV_SETTINGS \
156 "env_version=" __stringify(CONFIG_ENV_VERSION) "\0" \
157 "consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \
158 "mtdparts=" MTDPARTS_DEFAULT "\0" \
159 "partition=nand0,6\0" \
160 "u-boot_addr=" __stringify(ACFG_MONITOR_OFFSET) "\0" \
161 "env_addr=" __stringify(CONFIG_ENV_OFFSET) "\0" \
162 "firmware_addr=" __stringify(CONFIG_FIRMWARE_OFFSET) "\0" \
163 "firmware_size=" __stringify(CONFIG_FIRMWARE_SIZE) "\0" \
164 "kernel_addr=" __stringify(CONFIG_KERNEL_OFFSET) "\0" \
165 "rootfs_addr=" __stringify(CONFIG_ROOTFS_OFFSET) "\0" \
166 "board_name=" __stringify(CONFIG_BOARD_NAME) "\0" \
167 "kernel_addr_r=A0000000\0" \
168 "check_env=if test -n ${flash_env_version}; " \
169 "then env default env_version; " \
170 "else env set flash_env_version ${env_version}; env save; "\
171 "fi; " \
172 "if itest ${flash_env_version} < ${env_version}; then " \
173 "echo \"*** Warning - Environment version" \
174 " change suggests: run flash_reset_env; reset\"; "\
175 "env default flash_reset_env; "\
176 "fi; \0" \
177 "check_flash=nand lock; nand unlock ${env_addr}; \0" \
178 "flash_reset_env=env default -f -a; saveenv; run update_env;" \
179 "echo Flash environment variables erased!\0" \
180 "download_uboot=tftpboot ${loadaddr} ${board_name}" \
181 "-u-boot-with-spl.bin\0" \
182 "flash_uboot=nand unlock ${u-boot_addr} ;" \
183 "nand erase.part u-boot;" \
184 "if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\
185 "then nand lock; nand unlock ${env_addr};" \
186 "echo Flashing of uboot succeed;" \
187 "else echo Flashing of uboot failed;" \
188 "fi; \0" \
189 "update_uboot=run download_uboot flash_uboot\0" \
190 "download_env=tftpboot ${loadaddr} ${board_name}" \
191 "-u-boot-env.txt\0" \
192 "flash_env=env import -t ${loadaddr}; env save; \0" \
193 "update_env=run download_env flash_env\0" \
194 "update_all=run update_env update_uboot\0" \
195 "unlock_regs=mw 10000008 0; mw 10020008 0\0" \
196
197 /*
198 * Serial Driver
199 */
200 #define CONFIG_MXC_UART
201 #define CONFIG_CONS_INDEX 1
202 #define CONFIG_MXC_UART_BASE UART1_BASE
203
204 /*
205 * GPIO
206 */
207 #define CONFIG_MXC_GPIO
208
209 /*
210 * NOR
211 */
212
213 /*
214 * NAND
215 */
216 #define CONFIG_NAND_MXC
217
218 #define CONFIG_MXC_NAND_REGS_BASE 0xD8000000
219 #define CONFIG_SYS_NAND_BASE CONFIG_MXC_NAND_REGS_BASE
220 #define CONFIG_SYS_MAX_NAND_DEVICE 1
221
222 #define CONFIG_MXC_NAND_HWECC
223 #define CONFIG_SYS_NAND_LARGEPAGE
224 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
225 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
226 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
227 #define CONFIG_SYS_NAND_PAGE_COUNT CONFIG_SYS_NAND_BLOCK_SIZE / \
228 CONFIG_SYS_NAND_PAGE_SIZE
229 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
230 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 11
231 #define NAND_MAX_CHIPS 1
232
233 #define CONFIG_FLASH_SHOW_PROGRESS 45
234 #define CONFIG_SYS_NAND_QUIET 1
235
236 /*
237 * Partitions & Filsystems
238 */
239 #define CONFIG_MTD_DEVICE
240 #define CONFIG_MTD_PARTITIONS
241 #define CONFIG_SUPPORT_VFAT
242
243 /*
244 * UBIFS
245 */
246 #define CONFIG_RBTREE
247 #define CONFIG_LZO
248
249 /*
250 * Ethernet (on SOC imx FEC)
251 */
252 #define CONFIG_FEC_MXC
253 #define CONFIG_FEC_MXC_PHYADDR 0x1f
254 #define CONFIG_MII /* MII PHY management */
255
256 /*
257 * FPGA
258 */
259 #ifndef CONFIG_SPL_BUILD
260 #define CONFIG_FPGA
261 #endif
262 #define CONFIG_FPGA_COUNT 1
263 #define CONFIG_FPGA_XILINX
264 #define CONFIG_FPGA_SPARTAN3
265 #define CONFIG_SYS_FPGA_WAIT 250 /* 250 ms */
266 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
267 #define CONFIG_SYS_FPGA_CHECK_CTRLC
268 #define CONFIG_SYS_FPGA_CHECK_ERROR
269
270 /*
271 * Fuses - IIM
272 */
273 #ifdef CONFIG_CMD_IMX_FUSE
274 #define IIM_MAC_BANK 0
275 #define IIM_MAC_ROW 5
276 #define IIM0_SCC_KEY 11
277 #define IIM1_SUID 1
278 #endif
279
280 /*
281 * I2C
282 */
283
284 #ifdef CONFIG_CMD_I2C
285 #define CONFIG_SYS_I2C
286 #define CONFIG_SYS_I2C_MXC
287 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
288 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
289 #define CONFIG_SYS_MXC_I2C1_SPEED 100000 /* 100 kHz */
290 #define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F
291 #define CONFIG_SYS_MXC_I2C2_SPEED 100000 /* 100 kHz */
292 #define CONFIG_SYS_MXC_I2C2_SLAVE 0x7F
293 #define CONFIG_SYS_I2C_NOPROBES { }
294
295 #ifdef CONFIG_CMD_EEPROM
296 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24LC02 */
297 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
298 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
299 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* msec */
300 #endif /* CONFIG_CMD_EEPROM */
301 #endif /* CONFIG_CMD_I2C */
302
303 /*
304 * SD/MMC
305 */
306 #ifdef CONFIG_CMD_MMC
307 #define CONFIG_MXC_MCI_REGS_BASE 0x10014000
308 #endif
309
310 /*
311 * RTC
312 */
313 #ifdef CONFIG_CMD_DATE
314 #define CONFIG_RTC_DS1374
315 #define CONFIG_SYS_RTC_BUS_NUM 0
316 #endif /* CONFIG_CMD_DATE */
317
318 /*
319 * PLL
320 *
321 * 31 | x |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0
322 * |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------|
323 */
324 #define CONFIG_MX27_CLK32 32768 /* 32768 or 32000 Hz crystal */
325
326 #if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */
327 /* micron 64MB */
328 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
329 #define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */
330 #endif
331
332 #if (ACFG_SDRAM_MBYTE_SYZE == 128)
333 /* micron 128MB */
334 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
335 #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
336 #endif
337
338 #if (ACFG_SDRAM_MBYTE_SYZE == 256)
339 /* micron 256MB */
340 #define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
341 #define PHYS_SDRAM_2_SIZE 0x10000000 /* 256 MB */
342 #endif
343
344 #endif /* __CONFIG_H */