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Convert CONFIG_CMD_EEPROM et al to Kconfig
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1 /*
2 *
3 * Configuration settings for the Armadeus Project motherboard APF27
4 *
5 * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12
13 #define CONFIG_ENV_VERSION 10
14 #define CONFIG_BOARD_NAME apf27
15
16 /*
17 * SoC configurations
18 */
19 #define CONFIG_MX27 /* This is a Freescale i.MX27 Chip */
20 #define CONFIG_MACH_TYPE 1698 /* APF27 */
21
22 /*
23 * Enable the call to miscellaneous platform dependent initialization.
24 */
25
26 /*
27 * SPL
28 */
29 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
30 #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
31 #define CONFIG_SPL_MAX_SIZE 2048
32 #define CONFIG_SPL_TEXT_BASE 0xA0000000
33
34 /* NAND boot config */
35 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
36 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800
37 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
38 #define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN - 0x800
39
40 /*
41 * BOOTP options
42 */
43 #define CONFIG_BOOTP_SUBNETMASK
44 #define CONFIG_BOOTP_GATEWAY
45 #define CONFIG_BOOTP_HOSTNAME
46 #define CONFIG_BOOTP_BOOTPATH
47 #define CONFIG_BOOTP_BOOTFILESIZE
48 #define CONFIG_BOOTP_DNS
49 #define CONFIG_BOOTP_DNS2
50
51 #define CONFIG_HOSTNAME CONFIG_BOARD_NAME
52 #define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
53
54 /*
55 * U-Boot Commands
56 */
57 #define CONFIG_CMD_IMX_FUSE /* imx iim fuse */
58 #define CONFIG_CMD_MTDPARTS /* MTD partition support */
59 #define CONFIG_CMD_NAND /* NAND support */
60 #define CONFIG_CMD_NAND_LOCK_UNLOCK
61 #define CONFIG_CMD_NAND_TRIMFFS
62 #define CONFIG_CMD_UBIFS
63
64 /*
65 * Memory configurations
66 */
67 #define CONFIG_NR_DRAM_POPULATED 1
68 #define CONFIG_NR_DRAM_BANKS 2
69
70 #define ACFG_SDRAM_MBYTE_SYZE 64
71
72 #define PHYS_SDRAM_1 0xA0000000
73 #define PHYS_SDRAM_2 0xB0000000
74 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
75 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (512<<10))
76 #define CONFIG_SYS_MEMTEST_START 0xA0000000 /* memtest test area */
77 #define CONFIG_SYS_MEMTEST_END 0xA0300000 /* 3 MiB RAM test */
78
79 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE \
80 + PHYS_SDRAM_1_SIZE - 0x0100000)
81
82 #define CONFIG_SYS_TEXT_BASE 0xA0000800
83
84 /*
85 * FLASH organization
86 */
87 #define ACFG_MONITOR_OFFSET 0x00000000
88 #define CONFIG_SYS_MONITOR_LEN 0x00100000 /* 1MiB */
89 #define CONFIG_ENV_IS_IN_NAND
90 #define CONFIG_ENV_OVERWRITE
91 #define CONFIG_ENV_OFFSET 0x00100000 /* NAND offset */
92 #define CONFIG_ENV_SIZE 0x00020000 /* 128kB */
93 #define CONFIG_ENV_RANGE 0X00080000 /* 512kB */
94 #define CONFIG_ENV_OFFSET_REDUND \
95 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) /* +512kB */
96 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE /* 512kB */
97 #define CONFIG_FIRMWARE_OFFSET 0x00200000
98 #define CONFIG_FIRMWARE_SIZE 0x00080000 /* 512kB */
99 #define CONFIG_KERNEL_OFFSET 0x00300000
100 #define CONFIG_ROOTFS_OFFSET 0x00800000
101
102 #define CONFIG_MTDMAP "mxc_nand.0"
103 #define MTDIDS_DEFAULT "nand0=" CONFIG_MTDMAP
104 #define MTDPARTS_DEFAULT "mtdparts=" CONFIG_MTDMAP \
105 ":1M(u-boot)ro," \
106 "512K(env)," \
107 "512K(env2)," \
108 "512K(firmware)," \
109 "512K(dtb)," \
110 "5M(kernel)," \
111 "-(rootfs)"
112
113 /*
114 * U-Boot general configurations
115 */
116 #define CONFIG_SYS_LONGHELP
117 #define CONFIG_SYS_CBSIZE 2048 /* console I/O buffer */
118 #define CONFIG_SYS_PBSIZE \
119 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
120 /* Print buffer size */
121 #define CONFIG_SYS_MAXARGS 16 /* max command args */
122 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
123 /* Boot argument buffer size */
124 #define CONFIG_AUTO_COMPLETE
125 #define CONFIG_CMDLINE_EDITING
126 #define CONFIG_ENV_VARS_UBOOT_CONFIG
127 #define CONFIG_PREBOOT "run check_flash check_env;"
128
129 /*
130 * Boot Linux
131 */
132 #define CONFIG_CMDLINE_TAG /* send commandline to Kernel */
133 #define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */
134 #define CONFIG_INITRD_TAG /* send initrd params */
135
136 #define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin"
137 #define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," \
138 __stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \
139 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs "
140
141 #define ACFG_CONSOLE_DEV ttySMX0
142 #define CONFIG_BOOTCOMMAND "run ubifsboot"
143 #define CONFIG_SYS_AUTOLOAD "no"
144 /*
145 * Default load address for user programs and kernel
146 */
147 #define CONFIG_LOADADDR 0xA0000000
148 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
149
150 /*
151 * Extra Environments
152 */
153 #define CONFIG_EXTRA_ENV_SETTINGS \
154 "env_version=" __stringify(CONFIG_ENV_VERSION) "\0" \
155 "consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \
156 "mtdparts=" MTDPARTS_DEFAULT "\0" \
157 "partition=nand0,6\0" \
158 "u-boot_addr=" __stringify(ACFG_MONITOR_OFFSET) "\0" \
159 "env_addr=" __stringify(CONFIG_ENV_OFFSET) "\0" \
160 "firmware_addr=" __stringify(CONFIG_FIRMWARE_OFFSET) "\0" \
161 "firmware_size=" __stringify(CONFIG_FIRMWARE_SIZE) "\0" \
162 "kernel_addr=" __stringify(CONFIG_KERNEL_OFFSET) "\0" \
163 "rootfs_addr=" __stringify(CONFIG_ROOTFS_OFFSET) "\0" \
164 "board_name=" __stringify(CONFIG_BOARD_NAME) "\0" \
165 "kernel_addr_r=A0000000\0" \
166 "check_env=if test -n ${flash_env_version}; " \
167 "then env default env_version; " \
168 "else env set flash_env_version ${env_version}; env save; "\
169 "fi; " \
170 "if itest ${flash_env_version} < ${env_version}; then " \
171 "echo \"*** Warning - Environment version" \
172 " change suggests: run flash_reset_env; reset\"; "\
173 "env default flash_reset_env; "\
174 "fi; \0" \
175 "check_flash=nand lock; nand unlock ${env_addr}; \0" \
176 "flash_reset_env=env default -f -a; saveenv; run update_env;" \
177 "echo Flash environment variables erased!\0" \
178 "download_uboot=tftpboot ${loadaddr} ${board_name}" \
179 "-u-boot-with-spl.bin\0" \
180 "flash_uboot=nand unlock ${u-boot_addr} ;" \
181 "nand erase.part u-boot;" \
182 "if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\
183 "then nand lock; nand unlock ${env_addr};" \
184 "echo Flashing of uboot succeed;" \
185 "else echo Flashing of uboot failed;" \
186 "fi; \0" \
187 "update_uboot=run download_uboot flash_uboot\0" \
188 "download_env=tftpboot ${loadaddr} ${board_name}" \
189 "-u-boot-env.txt\0" \
190 "flash_env=env import -t ${loadaddr}; env save; \0" \
191 "update_env=run download_env flash_env\0" \
192 "update_all=run update_env update_uboot\0" \
193 "unlock_regs=mw 10000008 0; mw 10020008 0\0" \
194
195 /*
196 * Serial Driver
197 */
198 #define CONFIG_MXC_UART
199 #define CONFIG_CONS_INDEX 1
200 #define CONFIG_MXC_UART_BASE UART1_BASE
201
202 /*
203 * GPIO
204 */
205 #define CONFIG_MXC_GPIO
206
207 /*
208 * NOR
209 */
210
211 /*
212 * NAND
213 */
214 #define CONFIG_NAND_MXC
215
216 #define CONFIG_MXC_NAND_REGS_BASE 0xD8000000
217 #define CONFIG_SYS_NAND_BASE CONFIG_MXC_NAND_REGS_BASE
218 #define CONFIG_SYS_MAX_NAND_DEVICE 1
219
220 #define CONFIG_MXC_NAND_HWECC
221 #define CONFIG_SYS_NAND_LARGEPAGE
222 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
223 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
224 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
225 #define CONFIG_SYS_NAND_PAGE_COUNT CONFIG_SYS_NAND_BLOCK_SIZE / \
226 CONFIG_SYS_NAND_PAGE_SIZE
227 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
228 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 11
229 #define NAND_MAX_CHIPS 1
230
231 #define CONFIG_FLASH_SHOW_PROGRESS 45
232 #define CONFIG_SYS_NAND_QUIET 1
233
234 /*
235 * Partitions & Filsystems
236 */
237 #define CONFIG_MTD_DEVICE
238 #define CONFIG_MTD_PARTITIONS
239 #define CONFIG_SUPPORT_VFAT
240
241 /*
242 * UBIFS
243 */
244 #define CONFIG_RBTREE
245 #define CONFIG_LZO
246
247 /*
248 * Ethernet (on SOC imx FEC)
249 */
250 #define CONFIG_FEC_MXC
251 #define CONFIG_FEC_MXC_PHYADDR 0x1f
252 #define CONFIG_MII /* MII PHY management */
253
254 /*
255 * FPGA
256 */
257 #ifndef CONFIG_SPL_BUILD
258 #define CONFIG_FPGA
259 #endif
260 #define CONFIG_FPGA_COUNT 1
261 #define CONFIG_FPGA_XILINX
262 #define CONFIG_FPGA_SPARTAN3
263 #define CONFIG_SYS_FPGA_WAIT 250 /* 250 ms */
264 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
265 #define CONFIG_SYS_FPGA_CHECK_CTRLC
266 #define CONFIG_SYS_FPGA_CHECK_ERROR
267
268 /*
269 * Fuses - IIM
270 */
271 #ifdef CONFIG_CMD_IMX_FUSE
272 #define IIM_MAC_BANK 0
273 #define IIM_MAC_ROW 5
274 #define IIM0_SCC_KEY 11
275 #define IIM1_SUID 1
276 #endif
277
278 /*
279 * I2C
280 */
281
282 #ifdef CONFIG_CMD_I2C
283 #define CONFIG_SYS_I2C
284 #define CONFIG_SYS_I2C_MXC
285 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
286 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
287 #define CONFIG_SYS_MXC_I2C1_SPEED 100000 /* 100 kHz */
288 #define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F
289 #define CONFIG_SYS_MXC_I2C2_SPEED 100000 /* 100 kHz */
290 #define CONFIG_SYS_MXC_I2C2_SLAVE 0x7F
291 #define CONFIG_SYS_I2C_NOPROBES { }
292
293 #ifdef CONFIG_CMD_EEPROM
294 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24LC02 */
295 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
296 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
297 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* msec */
298 #endif /* CONFIG_CMD_EEPROM */
299 #endif /* CONFIG_CMD_I2C */
300
301 /*
302 * SD/MMC
303 */
304 #ifdef CONFIG_CMD_MMC
305 #define CONFIG_MXC_MCI_REGS_BASE 0x10014000
306 #endif
307
308 /*
309 * RTC
310 */
311 #ifdef CONFIG_CMD_DATE
312 #define CONFIG_RTC_DS1374
313 #define CONFIG_SYS_RTC_BUS_NUM 0
314 #endif /* CONFIG_CMD_DATE */
315
316 /*
317 * PLL
318 *
319 * 31 | x |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0
320 * |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------|
321 */
322 #define CONFIG_MX27_CLK32 32768 /* 32768 or 32000 Hz crystal */
323
324 #if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */
325 /* micron 64MB */
326 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
327 #define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */
328 #endif
329
330 #if (ACFG_SDRAM_MBYTE_SYZE == 128)
331 /* micron 128MB */
332 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
333 #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
334 #endif
335
336 #if (ACFG_SDRAM_MBYTE_SYZE == 256)
337 /* micron 256MB */
338 #define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
339 #define PHYS_SDRAM_2_SIZE 0x10000000 /* 256 MB */
340 #endif
341
342 #endif /* __CONFIG_H */