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1 /*
2 *
3 * Configuration settings for the Armadeus Project motherboard APF27
4 *
5 * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12
13 #define CONFIG_VERSION_VARIABLE
14 #define CONFIG_ENV_VERSION 10
15 #define CONFIG_IDENT_STRING " apf27 patch 3.10"
16 #define CONFIG_BOARD_NAME apf27
17
18 /*
19 * SoC configurations
20 */
21 #define CONFIG_MX27 /* This is a Freescale i.MX27 Chip */
22 #define CONFIG_MACH_TYPE 1698 /* APF27 */
23
24 /*
25 * Enable the call to miscellaneous platform dependent initialization.
26 */
27 #define CONFIG_SYS_NO_FLASH
28
29 /*
30 * Board display option
31 */
32 #define CONFIG_DISPLAY_BOARDINFO
33 #define CONFIG_DISPLAY_CPUINFO
34
35 /*
36 * SPL
37 */
38 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
39 #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
40 #define CONFIG_SPL_MAX_SIZE 2048
41 #define CONFIG_SPL_TEXT_BASE 0xA0000000
42 #define CONFIG_SPL_SERIAL_SUPPORT
43
44 /* NAND boot config */
45 #define CONFIG_SPL_NAND_SUPPORT
46 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
47 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800
48 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
49 #define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN - 0x800
50
51 /*
52 * BOOTP options
53 */
54 #define CONFIG_BOOTP_SUBNETMASK
55 #define CONFIG_BOOTP_GATEWAY
56 #define CONFIG_BOOTP_HOSTNAME
57 #define CONFIG_BOOTP_BOOTPATH
58 #define CONFIG_BOOTP_BOOTFILESIZE
59 #define CONFIG_BOOTP_DNS
60 #define CONFIG_BOOTP_DNS2
61
62 #define CONFIG_HOSTNAME CONFIG_BOARD_NAME
63 #define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
64
65 /*
66 * U-Boot Commands
67 */
68 #define CONFIG_CMD_ASKENV /* ask for env variable */
69 #define CONFIG_CMD_BSP /* Board Specific functions */
70 #define CONFIG_CMD_CACHE /* icache, dcache */
71 #define CONFIG_CMD_DATE
72 #define CONFIG_CMD_DHCP /* DHCP Support */
73 #define CONFIG_CMD_DNS
74 #define CONFIG_CMD_EEPROM
75 #define CONFIG_CMD_EXT2
76 #define CONFIG_CMD_FAT /* FAT support */
77 #define CONFIG_CMD_IMX_FUSE /* imx iim fuse */
78 #define CONFIG_CMD_I2C
79 #define CONFIG_CMD_MII /* MII support */
80 #define CONFIG_CMD_MMC
81 #define CONFIG_CMD_MTDPARTS /* MTD partition support */
82 #define CONFIG_CMD_NAND /* NAND support */
83 #define CONFIG_CMD_NAND_LOCK_UNLOCK
84 #define CONFIG_CMD_NAND_TRIMFFS
85 #define CONFIG_CMD_PING /* ping support */
86 #define CONFIG_CMD_UBI
87 #define CONFIG_CMD_UBIFS
88
89 /*
90 * Memory configurations
91 */
92 #define CONFIG_NR_DRAM_POPULATED 1
93 #define CONFIG_NR_DRAM_BANKS 2
94
95 #define ACFG_SDRAM_MBYTE_SYZE 64
96
97 #define PHYS_SDRAM_1 0xA0000000
98 #define PHYS_SDRAM_2 0xB0000000
99 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
100 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (512<<10))
101 #define CONFIG_SYS_MEMTEST_START 0xA0000000 /* memtest test area */
102 #define CONFIG_SYS_MEMTEST_END 0xA0300000 /* 3 MiB RAM test */
103
104 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE \
105 + PHYS_SDRAM_1_SIZE - 0x0100000)
106
107 #define CONFIG_SYS_TEXT_BASE 0xA0000800
108
109 /*
110 * FLASH organization
111 */
112 #define ACFG_MONITOR_OFFSET 0x00000000
113 #define CONFIG_SYS_MONITOR_LEN 0x00100000 /* 1MiB */
114 #define CONFIG_ENV_IS_IN_NAND
115 #define CONFIG_ENV_OVERWRITE
116 #define CONFIG_ENV_OFFSET 0x00100000 /* NAND offset */
117 #define CONFIG_ENV_SIZE 0x00020000 /* 128kB */
118 #define CONFIG_ENV_RANGE 0X00080000 /* 512kB */
119 #define CONFIG_ENV_OFFSET_REDUND \
120 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) /* +512kB */
121 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE /* 512kB */
122 #define CONFIG_FIRMWARE_OFFSET 0x00200000
123 #define CONFIG_FIRMWARE_SIZE 0x00080000 /* 512kB */
124 #define CONFIG_KERNEL_OFFSET 0x00300000
125 #define CONFIG_ROOTFS_OFFSET 0x00800000
126
127 #define CONFIG_MTDMAP "mxc_nand.0"
128 #define MTDIDS_DEFAULT "nand0=" CONFIG_MTDMAP
129 #define MTDPARTS_DEFAULT "mtdparts=" CONFIG_MTDMAP \
130 ":1M(u-boot)ro," \
131 "512K(env)," \
132 "512K(env2)," \
133 "512K(firmware)," \
134 "512K(dtb)," \
135 "5M(kernel)," \
136 "-(rootfs)"
137
138 /*
139 * U-Boot general configurations
140 */
141 #define CONFIG_SYS_LONGHELP
142 #define CONFIG_SYS_CBSIZE 2048 /* console I/O buffer */
143 #define CONFIG_SYS_PBSIZE \
144 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
145 /* Print buffer size */
146 #define CONFIG_SYS_MAXARGS 16 /* max command args */
147 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
148 /* Boot argument buffer size */
149 #define CONFIG_AUTO_COMPLETE
150 #define CONFIG_CMDLINE_EDITING
151 #define CONFIG_SYS_HUSH_PARSER /* enable the "hush" shell */
152 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /* secondary prompt string */
153 #define CONFIG_ENV_VARS_UBOOT_CONFIG
154 #define CONFIG_PREBOOT "run check_flash check_env;"
155
156
157 /*
158 * Boot Linux
159 */
160 #define CONFIG_CMDLINE_TAG /* send commandline to Kernel */
161 #define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */
162 #define CONFIG_INITRD_TAG /* send initrd params */
163
164 #define CONFIG_OF_LIBFDT
165
166 #define CONFIG_BOOTDELAY 5
167 #define CONFIG_ZERO_BOOTDELAY_CHECK
168 #define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin"
169 #define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," \
170 __stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \
171 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs "
172
173 #define ACFG_CONSOLE_DEV ttySMX0
174 #define CONFIG_BOOTCOMMAND "run ubifsboot"
175 #define CONFIG_SYS_AUTOLOAD "no"
176 /*
177 * Default load address for user programs and kernel
178 */
179 #define CONFIG_LOADADDR 0xA0000000
180 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
181
182 /*
183 * Extra Environments
184 */
185 #define CONFIG_EXTRA_ENV_SETTINGS \
186 "env_version=" __stringify(CONFIG_ENV_VERSION) "\0" \
187 "consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \
188 "mtdparts=" MTDPARTS_DEFAULT "\0" \
189 "partition=nand0,6\0" \
190 "u-boot_addr=" __stringify(ACFG_MONITOR_OFFSET) "\0" \
191 "env_addr=" __stringify(CONFIG_ENV_OFFSET) "\0" \
192 "firmware_addr=" __stringify(CONFIG_FIRMWARE_OFFSET) "\0" \
193 "firmware_size=" __stringify(CONFIG_FIRMWARE_SIZE) "\0" \
194 "kernel_addr=" __stringify(CONFIG_KERNEL_OFFSET) "\0" \
195 "rootfs_addr=" __stringify(CONFIG_ROOTFS_OFFSET) "\0" \
196 "board_name=" __stringify(CONFIG_BOARD_NAME) "\0" \
197 "kernel_addr_r=A0000000\0" \
198 "check_env=if test -n ${flash_env_version}; " \
199 "then env default env_version; " \
200 "else env set flash_env_version ${env_version}; env save; "\
201 "fi; " \
202 "if itest ${flash_env_version} < ${env_version}; then " \
203 "echo \"*** Warning - Environment version" \
204 " change suggests: run flash_reset_env; reset\"; "\
205 "env default flash_reset_env; "\
206 "fi; \0" \
207 "check_flash=nand lock; nand unlock ${env_addr}; \0" \
208 "flash_reset_env=env default -f -a; saveenv; run update_env;" \
209 "echo Flash environment variables erased!\0" \
210 "download_uboot=tftpboot ${loadaddr} ${board_name}" \
211 "-u-boot-with-spl.bin\0" \
212 "flash_uboot=nand unlock ${u-boot_addr} ;" \
213 "nand erase.part u-boot;" \
214 "if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\
215 "then nand lock; nand unlock ${env_addr};" \
216 "echo Flashing of uboot succeed;" \
217 "else echo Flashing of uboot failed;" \
218 "fi; \0" \
219 "update_uboot=run download_uboot flash_uboot\0" \
220 "download_env=tftpboot ${loadaddr} ${board_name}" \
221 "-u-boot-env.txt\0" \
222 "flash_env=env import -t ${loadaddr}; env save; \0" \
223 "update_env=run download_env flash_env\0" \
224 "update_all=run update_env update_uboot\0" \
225 "unlock_regs=mw 10000008 0; mw 10020008 0\0" \
226
227 /*
228 * Serial Driver
229 */
230 #define CONFIG_MXC_UART
231 #define CONFIG_CONS_INDEX 1
232 #define CONFIG_BAUDRATE 115200
233 #define CONFIG_MXC_UART_BASE UART1_BASE
234
235 /*
236 * GPIO
237 */
238 #define CONFIG_MXC_GPIO
239
240 /*
241 * NOR
242 */
243
244 /*
245 * NAND
246 */
247 #define CONFIG_NAND_MXC
248
249 #define CONFIG_MXC_NAND_REGS_BASE 0xD8000000
250 #define CONFIG_SYS_NAND_BASE CONFIG_MXC_NAND_REGS_BASE
251 #define CONFIG_SYS_MAX_NAND_DEVICE 1
252
253 #define CONFIG_MXC_NAND_HWECC
254 #define CONFIG_SYS_NAND_LARGEPAGE
255 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
256 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
257 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
258 #define CONFIG_SYS_NAND_PAGE_COUNT CONFIG_SYS_NAND_BLOCK_SIZE / \
259 CONFIG_SYS_NAND_PAGE_SIZE
260 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
261 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 11
262 #define NAND_MAX_CHIPS 1
263
264 #define CONFIG_FLASH_SHOW_PROGRESS 45
265 #define CONFIG_SYS_NAND_QUIET 1
266
267 /*
268 * Partitions & Filsystems
269 */
270 #define CONFIG_MTD_DEVICE
271 #define CONFIG_MTD_PARTITIONS
272 #define CONFIG_DOS_PARTITION
273 #define CONFIG_SUPPORT_VFAT
274
275 /*
276 * UBIFS
277 */
278 #define CONFIG_RBTREE
279 #define CONFIG_LZO
280
281 /*
282 * Ethernet (on SOC imx FEC)
283 */
284 #define CONFIG_FEC_MXC
285 #define CONFIG_FEC_MXC_PHYADDR 0x1f
286 #define CONFIG_MII /* MII PHY management */
287
288 /*
289 * FPGA
290 */
291 #ifndef CONFIG_SPL_BUILD
292 #define CONFIG_FPGA
293 #endif
294 #define CONFIG_FPGA_COUNT 1
295 #define CONFIG_FPGA_XILINX
296 #define CONFIG_FPGA_SPARTAN3
297 #define CONFIG_SYS_FPGA_WAIT 250 /* 250 ms */
298 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
299 #define CONFIG_SYS_FPGA_CHECK_CTRLC
300 #define CONFIG_SYS_FPGA_CHECK_ERROR
301
302 /*
303 * Fuses - IIM
304 */
305 #ifdef CONFIG_CMD_IMX_FUSE
306 #define IIM_MAC_BANK 0
307 #define IIM_MAC_ROW 5
308 #define IIM0_SCC_KEY 11
309 #define IIM1_SUID 1
310 #endif
311
312 /*
313 * I2C
314 */
315
316 #ifdef CONFIG_CMD_I2C
317 #define CONFIG_SYS_I2C
318 #define CONFIG_SYS_I2C_MXC
319 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
320 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
321 #define CONFIG_SYS_MXC_I2C1_SPEED 100000 /* 100 kHz */
322 #define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F
323 #define CONFIG_SYS_MXC_I2C2_SPEED 100000 /* 100 kHz */
324 #define CONFIG_SYS_MXC_I2C2_SLAVE 0x7F
325 #define CONFIG_SYS_I2C_NOPROBES { }
326
327 #ifdef CONFIG_CMD_EEPROM
328 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24LC02 */
329 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
330 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
331 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* msec */
332 #endif /* CONFIG_CMD_EEPROM */
333 #endif /* CONFIG_CMD_I2C */
334
335 /*
336 * SD/MMC
337 */
338 #ifdef CONFIG_CMD_MMC
339 #define CONFIG_MMC
340 #define CONFIG_GENERIC_MMC
341 #define CONFIG_MXC_MMC
342 #define CONFIG_MXC_MCI_REGS_BASE 0x10014000
343 #endif
344
345 /*
346 * RTC
347 */
348 #ifdef CONFIG_CMD_DATE
349 #define CONFIG_RTC_DS1374
350 #define CONFIG_SYS_RTC_BUS_NUM 0
351 #endif /* CONFIG_CMD_DATE */
352
353 /*
354 * PLL
355 *
356 * 31 | x |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0
357 * |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------|
358 */
359 #define CONFIG_MX27_CLK32 32768 /* 32768 or 32000 Hz crystal */
360
361 #if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */
362 /* micron 64MB */
363 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
364 #define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */
365 #endif
366
367 #if (ACFG_SDRAM_MBYTE_SYZE == 128)
368 /* micron 128MB */
369 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
370 #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
371 #endif
372
373 #if (ACFG_SDRAM_MBYTE_SYZE == 256)
374 /* micron 256MB */
375 #define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
376 #define PHYS_SDRAM_2_SIZE 0x10000000 /* 256 MB */
377 #endif
378
379 #endif /* __CONFIG_H */