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[people/ms/u-boot.git] / include / configs / apf27.h
1 /*
2 *
3 * Configuration settings for the Armadeus Project motherboard APF27
4 *
5 * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12
13 #define CONFIG_ENV_VERSION 10
14 #define CONFIG_BOARD_NAME apf27
15
16 /*
17 * SoC configurations
18 */
19 #define CONFIG_MX27 /* This is a Freescale i.MX27 Chip */
20 #define CONFIG_MACH_TYPE 1698 /* APF27 */
21
22 /*
23 * Enable the call to miscellaneous platform dependent initialization.
24 */
25
26 /*
27 * SPL
28 */
29 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
30 #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
31 #define CONFIG_SPL_MAX_SIZE 2048
32 #define CONFIG_SPL_TEXT_BASE 0xA0000000
33
34 /* NAND boot config */
35 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
36 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800
37 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
38 #define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN - 0x800
39
40 /*
41 * BOOTP options
42 */
43 #define CONFIG_BOOTP_SUBNETMASK
44 #define CONFIG_BOOTP_GATEWAY
45 #define CONFIG_BOOTP_HOSTNAME
46 #define CONFIG_BOOTP_BOOTPATH
47 #define CONFIG_BOOTP_BOOTFILESIZE
48 #define CONFIG_BOOTP_DNS
49 #define CONFIG_BOOTP_DNS2
50
51 #define CONFIG_HOSTNAME CONFIG_BOARD_NAME
52 #define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
53
54 /*
55 * U-Boot Commands
56 */
57 #define CONFIG_CMD_MTDPARTS /* MTD partition support */
58 #define CONFIG_CMD_NAND /* NAND support */
59 #define CONFIG_CMD_NAND_LOCK_UNLOCK
60 #define CONFIG_CMD_NAND_TRIMFFS
61 #define CONFIG_CMD_UBIFS
62
63 /*
64 * Memory configurations
65 */
66 #define CONFIG_NR_DRAM_POPULATED 1
67 #define CONFIG_NR_DRAM_BANKS 2
68
69 #define ACFG_SDRAM_MBYTE_SYZE 64
70
71 #define PHYS_SDRAM_1 0xA0000000
72 #define PHYS_SDRAM_2 0xB0000000
73 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
74 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (512<<10))
75 #define CONFIG_SYS_MEMTEST_START 0xA0000000 /* memtest test area */
76 #define CONFIG_SYS_MEMTEST_END 0xA0300000 /* 3 MiB RAM test */
77
78 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE \
79 + PHYS_SDRAM_1_SIZE - 0x0100000)
80
81 #define CONFIG_SYS_TEXT_BASE 0xA0000800
82
83 /*
84 * FLASH organization
85 */
86 #define ACFG_MONITOR_OFFSET 0x00000000
87 #define CONFIG_SYS_MONITOR_LEN 0x00100000 /* 1MiB */
88 #define CONFIG_ENV_IS_IN_NAND
89 #define CONFIG_ENV_OVERWRITE
90 #define CONFIG_ENV_OFFSET 0x00100000 /* NAND offset */
91 #define CONFIG_ENV_SIZE 0x00020000 /* 128kB */
92 #define CONFIG_ENV_RANGE 0X00080000 /* 512kB */
93 #define CONFIG_ENV_OFFSET_REDUND \
94 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) /* +512kB */
95 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE /* 512kB */
96 #define CONFIG_FIRMWARE_OFFSET 0x00200000
97 #define CONFIG_FIRMWARE_SIZE 0x00080000 /* 512kB */
98 #define CONFIG_KERNEL_OFFSET 0x00300000
99 #define CONFIG_ROOTFS_OFFSET 0x00800000
100
101 #define CONFIG_MTDMAP "mxc_nand.0"
102 #define MTDIDS_DEFAULT "nand0=" CONFIG_MTDMAP
103 #define MTDPARTS_DEFAULT "mtdparts=" CONFIG_MTDMAP \
104 ":1M(u-boot)ro," \
105 "512K(env)," \
106 "512K(env2)," \
107 "512K(firmware)," \
108 "512K(dtb)," \
109 "5M(kernel)," \
110 "-(rootfs)"
111
112 /*
113 * U-Boot general configurations
114 */
115 #define CONFIG_SYS_LONGHELP
116 #define CONFIG_SYS_CBSIZE 2048 /* console I/O buffer */
117 #define CONFIG_SYS_PBSIZE \
118 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
119 /* Print buffer size */
120 #define CONFIG_SYS_MAXARGS 16 /* max command args */
121 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
122 /* Boot argument buffer size */
123 #define CONFIG_AUTO_COMPLETE
124 #define CONFIG_CMDLINE_EDITING
125 #define CONFIG_ENV_VARS_UBOOT_CONFIG
126 #define CONFIG_PREBOOT "run check_flash check_env;"
127
128 /*
129 * Boot Linux
130 */
131 #define CONFIG_CMDLINE_TAG /* send commandline to Kernel */
132 #define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */
133 #define CONFIG_INITRD_TAG /* send initrd params */
134
135 #define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin"
136 #define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," \
137 __stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \
138 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs "
139
140 #define ACFG_CONSOLE_DEV ttySMX0
141 #define CONFIG_BOOTCOMMAND "run ubifsboot"
142 #define CONFIG_SYS_AUTOLOAD "no"
143 /*
144 * Default load address for user programs and kernel
145 */
146 #define CONFIG_LOADADDR 0xA0000000
147 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
148
149 /*
150 * Extra Environments
151 */
152 #define CONFIG_EXTRA_ENV_SETTINGS \
153 "env_version=" __stringify(CONFIG_ENV_VERSION) "\0" \
154 "consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \
155 "mtdparts=" MTDPARTS_DEFAULT "\0" \
156 "partition=nand0,6\0" \
157 "u-boot_addr=" __stringify(ACFG_MONITOR_OFFSET) "\0" \
158 "env_addr=" __stringify(CONFIG_ENV_OFFSET) "\0" \
159 "firmware_addr=" __stringify(CONFIG_FIRMWARE_OFFSET) "\0" \
160 "firmware_size=" __stringify(CONFIG_FIRMWARE_SIZE) "\0" \
161 "kernel_addr=" __stringify(CONFIG_KERNEL_OFFSET) "\0" \
162 "rootfs_addr=" __stringify(CONFIG_ROOTFS_OFFSET) "\0" \
163 "board_name=" __stringify(CONFIG_BOARD_NAME) "\0" \
164 "kernel_addr_r=A0000000\0" \
165 "check_env=if test -n ${flash_env_version}; " \
166 "then env default env_version; " \
167 "else env set flash_env_version ${env_version}; env save; "\
168 "fi; " \
169 "if itest ${flash_env_version} < ${env_version}; then " \
170 "echo \"*** Warning - Environment version" \
171 " change suggests: run flash_reset_env; reset\"; "\
172 "env default flash_reset_env; "\
173 "fi; \0" \
174 "check_flash=nand lock; nand unlock ${env_addr}; \0" \
175 "flash_reset_env=env default -f -a; saveenv; run update_env;" \
176 "echo Flash environment variables erased!\0" \
177 "download_uboot=tftpboot ${loadaddr} ${board_name}" \
178 "-u-boot-with-spl.bin\0" \
179 "flash_uboot=nand unlock ${u-boot_addr} ;" \
180 "nand erase.part u-boot;" \
181 "if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\
182 "then nand lock; nand unlock ${env_addr};" \
183 "echo Flashing of uboot succeed;" \
184 "else echo Flashing of uboot failed;" \
185 "fi; \0" \
186 "update_uboot=run download_uboot flash_uboot\0" \
187 "download_env=tftpboot ${loadaddr} ${board_name}" \
188 "-u-boot-env.txt\0" \
189 "flash_env=env import -t ${loadaddr}; env save; \0" \
190 "update_env=run download_env flash_env\0" \
191 "update_all=run update_env update_uboot\0" \
192 "unlock_regs=mw 10000008 0; mw 10020008 0\0" \
193
194 /*
195 * Serial Driver
196 */
197 #define CONFIG_MXC_UART
198 #define CONFIG_CONS_INDEX 1
199 #define CONFIG_MXC_UART_BASE UART1_BASE
200
201 /*
202 * GPIO
203 */
204 #define CONFIG_MXC_GPIO
205
206 /*
207 * NOR
208 */
209
210 /*
211 * NAND
212 */
213 #define CONFIG_NAND_MXC
214
215 #define CONFIG_MXC_NAND_REGS_BASE 0xD8000000
216 #define CONFIG_SYS_NAND_BASE CONFIG_MXC_NAND_REGS_BASE
217 #define CONFIG_SYS_MAX_NAND_DEVICE 1
218
219 #define CONFIG_MXC_NAND_HWECC
220 #define CONFIG_SYS_NAND_LARGEPAGE
221 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
222 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
223 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
224 #define CONFIG_SYS_NAND_PAGE_COUNT CONFIG_SYS_NAND_BLOCK_SIZE / \
225 CONFIG_SYS_NAND_PAGE_SIZE
226 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
227 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 11
228 #define NAND_MAX_CHIPS 1
229
230 #define CONFIG_FLASH_SHOW_PROGRESS 45
231 #define CONFIG_SYS_NAND_QUIET 1
232
233 /*
234 * Partitions & Filsystems
235 */
236 #define CONFIG_MTD_DEVICE
237 #define CONFIG_MTD_PARTITIONS
238 #define CONFIG_SUPPORT_VFAT
239
240 /*
241 * UBIFS
242 */
243 #define CONFIG_RBTREE
244 #define CONFIG_LZO
245
246 /*
247 * Ethernet (on SOC imx FEC)
248 */
249 #define CONFIG_FEC_MXC
250 #define CONFIG_FEC_MXC_PHYADDR 0x1f
251 #define CONFIG_MII /* MII PHY management */
252
253 /*
254 * FPGA
255 */
256 #ifndef CONFIG_SPL_BUILD
257 #define CONFIG_FPGA
258 #endif
259 #define CONFIG_FPGA_COUNT 1
260 #define CONFIG_FPGA_XILINX
261 #define CONFIG_FPGA_SPARTAN3
262 #define CONFIG_SYS_FPGA_WAIT 250 /* 250 ms */
263 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
264 #define CONFIG_SYS_FPGA_CHECK_CTRLC
265 #define CONFIG_SYS_FPGA_CHECK_ERROR
266
267 /*
268 * Fuses - IIM
269 */
270 #ifdef CONFIG_CMD_IMX_FUSE
271 #define IIM_MAC_BANK 0
272 #define IIM_MAC_ROW 5
273 #define IIM0_SCC_KEY 11
274 #define IIM1_SUID 1
275 #endif
276
277 /*
278 * I2C
279 */
280
281 #ifdef CONFIG_CMD_I2C
282 #define CONFIG_SYS_I2C
283 #define CONFIG_SYS_I2C_MXC
284 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
285 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
286 #define CONFIG_SYS_MXC_I2C1_SPEED 100000 /* 100 kHz */
287 #define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F
288 #define CONFIG_SYS_MXC_I2C2_SPEED 100000 /* 100 kHz */
289 #define CONFIG_SYS_MXC_I2C2_SLAVE 0x7F
290 #define CONFIG_SYS_I2C_NOPROBES { }
291
292 #ifdef CONFIG_CMD_EEPROM
293 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24LC02 */
294 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
295 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
296 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* msec */
297 #endif /* CONFIG_CMD_EEPROM */
298 #endif /* CONFIG_CMD_I2C */
299
300 /*
301 * SD/MMC
302 */
303 #ifdef CONFIG_CMD_MMC
304 #define CONFIG_MXC_MCI_REGS_BASE 0x10014000
305 #endif
306
307 /*
308 * RTC
309 */
310 #ifdef CONFIG_CMD_DATE
311 #define CONFIG_RTC_DS1374
312 #define CONFIG_SYS_RTC_BUS_NUM 0
313 #endif /* CONFIG_CMD_DATE */
314
315 /*
316 * PLL
317 *
318 * 31 | x |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0
319 * |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------|
320 */
321 #define CONFIG_MX27_CLK32 32768 /* 32768 or 32000 Hz crystal */
322
323 #if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */
324 /* micron 64MB */
325 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
326 #define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */
327 #endif
328
329 #if (ACFG_SDRAM_MBYTE_SYZE == 128)
330 /* micron 128MB */
331 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
332 #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
333 #endif
334
335 #if (ACFG_SDRAM_MBYTE_SYZE == 256)
336 /* micron 256MB */
337 #define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
338 #define PHYS_SDRAM_2_SIZE 0x10000000 /* 256 MB */
339 #endif
340
341 #endif /* __CONFIG_H */