include/configs/apf27.h

   1 /*
   2  *
   3  * Configuration settings for the Armadeus Project motherboard APF27
   4  *
   5  * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org>
   6  *
   7  * SPDX-License-Identifier:    GPL-2.0+
   8  */
   9
  10 #ifndef __CONFIG_H
  11 #define __CONFIG_H
  12
  13 #define CONFIG_ENV_VERSION      10
  14 #define CONFIG_BOARD_NAME apf27
  15
  16 /*
  17  * SoC configurations
  18  */
  19 #define CONFIG_MX27                     /* This is a Freescale i.MX27 Chip */
  20 #define CONFIG_MACH_TYPE        1698    /* APF27 */
  21
  22 /*
  23  * Enable the call to miscellaneous platform dependent initialization.
  24  */
  25
  26 /*
  27  * SPL
  28  */
  29 #define CONFIG_SPL_TARGET       "u-boot-with-spl.bin"
  30 #define CONFIG_SPL_MAX_SIZE     2048
  31 #define CONFIG_SPL_TEXT_BASE    0xA0000000
  32
  33 /* NAND boot config */
  34 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
  35 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x800
  36 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
  37 #define CONFIG_SYS_NAND_U_BOOT_SIZE     CONFIG_SYS_MONITOR_LEN - 0x800
  38
  39 /*
  40  * BOOTP options
  41  */
  42 #define CONFIG_BOOTP_BOOTFILESIZE
  43 #define CONFIG_BOOTP_DNS2
  44
  45 #define CONFIG_HOSTNAME CONFIG_BOARD_NAME
  46 #define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
  47
  48 /*
  49  * Memory configurations
  50  */
  51 #define CONFIG_NR_DRAM_POPULATED 1
  52 #define CONFIG_NR_DRAM_BANKS    2
  53
  54 #define ACFG_SDRAM_MBYTE_SYZE 64
  55
  56 #define PHYS_SDRAM_1                    0xA0000000
  57 #define PHYS_SDRAM_2                    0xB0000000
  58 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
  59 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (512<<10))
  60 #define CONFIG_SYS_MEMTEST_START        0xA0000000      /* memtest test area  */
  61 #define CONFIG_SYS_MEMTEST_END          0xA0300000      /* 3 MiB RAM test */
  62
  63 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE  \
  64                 + PHYS_SDRAM_1_SIZE - 0x0100000)
  65
  66 /*
  67  * FLASH organization
  68  */
  69 #define ACFG_MONITOR_OFFSET             0x00000000
  70 #define CONFIG_SYS_MONITOR_LEN          0x00100000      /* 1MiB */
  71 #define CONFIG_ENV_OVERWRITE
  72 #define CONFIG_ENV_OFFSET               0x00100000      /* NAND offset */
  73 #define CONFIG_ENV_SIZE                 0x00020000      /* 128kB  */
  74 #define CONFIG_ENV_RANGE                0X00080000      /* 512kB */
  75 #define CONFIG_ENV_OFFSET_REDUND        \
  76                 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)  /* +512kB */
  77 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE /* 512kB */
  78 #define CONFIG_FIRMWARE_OFFSET          0x00200000
  79 #define CONFIG_FIRMWARE_SIZE            0x00080000      /* 512kB  */
  80 #define CONFIG_KERNEL_OFFSET            0x00300000
  81 #define CONFIG_ROOTFS_OFFSET            0x00800000
  82
  83 /*
  84  * U-Boot general configurations
  85  */
  86 #define CONFIG_SYS_CBSIZE               2048            /* console I/O buffer */
  87 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
  88                                                 /* Boot argument buffer size */
  89 #define CONFIG_PREBOOT                  "run check_flash check_env;"
  90
  91 /*
  92  * Boot Linux
  93  */
  94 #define CONFIG_CMDLINE_TAG              /* send commandline to Kernel   */
  95 #define CONFIG_SETUP_MEMORY_TAGS        /* send memory definition to kernel */
  96 #define CONFIG_INITRD_TAG               /* send initrd params   */
  97
  98 #define CONFIG_BOOTFILE         __stringify(CONFIG_BOARD_NAME) "-linux.bin"
  99
 100 #define ACFG_CONSOLE_DEV        ttySMX0
 101 #define CONFIG_BOOTCOMMAND      "run ubifsboot"
 102 #define CONFIG_SYS_AUTOLOAD     "no"
 103 /*
 104  * Default load address for user programs and kernel
 105  */
 106 #define CONFIG_LOADADDR                 0xA0000000
 107 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 108
 109 /*
 110  * Extra Environments
 111  */
 112 #define CONFIG_EXTRA_ENV_SETTINGS \
 113         "env_version="          __stringify(CONFIG_ENV_VERSION)         "\0" \
 114         "consoledev="           __stringify(ACFG_CONSOLE_DEV)           "\0" \
 115         "mtdparts="             CONFIG_MTDPARTS_DEFAULT "\0" \
 116         "partition=nand0,6\0"                                           \
 117         "u-boot_addr="          __stringify(ACFG_MONITOR_OFFSET)        "\0" \
 118         "env_addr="             __stringify(CONFIG_ENV_OFFSET)          "\0" \
 119         "firmware_addr="        __stringify(CONFIG_FIRMWARE_OFFSET)     "\0" \
 120         "firmware_size="        __stringify(CONFIG_FIRMWARE_SIZE)       "\0" \
 121         "kernel_addr="          __stringify(CONFIG_KERNEL_OFFSET)       "\0" \
 122         "rootfs_addr="          __stringify(CONFIG_ROOTFS_OFFSET)       "\0" \
 123         "board_name="           __stringify(CONFIG_BOARD_NAME)          "\0" \
 124         "kernel_addr_r=A0000000\0" \
 125         "check_env=if test -n ${flash_env_version}; "                   \
 126                 "then env default env_version; "                        \
 127                 "else env set flash_env_version ${env_version}; env save; "\
 128                 "fi; "                                                  \
 129                 "if itest ${flash_env_version} < ${env_version}; then " \
 130                         "echo \"*** Warning - Environment version"      \
 131                         " change suggests: run flash_reset_env; reset\"; "\
 132                         "env default flash_reset_env; "\
 133                 "fi; \0"                                                \
 134         "check_flash=nand lock; nand unlock ${env_addr}; \0"    \
 135         "flash_reset_env=env default -f -a; saveenv; run update_env;"   \
 136                 "echo Flash environment variables erased!\0"            \
 137         "download_uboot=tftpboot ${loadaddr} ${board_name}"             \
 138                 "-u-boot-with-spl.bin\0"                                \
 139         "flash_uboot=nand unlock ${u-boot_addr} ;"                      \
 140                 "nand erase.part u-boot;"               \
 141                 "if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\
 142                         "then nand lock; nand unlock ${env_addr};"      \
 143                                 "echo Flashing of uboot succeed;"       \
 144                         "else echo Flashing of uboot failed;"           \
 145                 "fi; \0"                                                \
 146         "update_uboot=run download_uboot flash_uboot\0"                 \
 147         "download_env=tftpboot ${loadaddr} ${board_name}"               \
 148                 "-u-boot-env.txt\0"                             \
 149         "flash_env=env import -t ${loadaddr}; env save; \0"             \
 150         "update_env=run download_env flash_env\0"                       \
 151         "update_all=run update_env update_uboot\0"                      \
 152         "unlock_regs=mw 10000008 0; mw 10020008 0\0"                    \
 153
 154 /*
 155  * Serial Driver
 156  */
 157 #define CONFIG_MXC_UART
 158 #define CONFIG_CONS_INDEX               1
 159 #define CONFIG_MXC_UART_BASE            UART1_BASE
 160
 161 /*
 162  * NOR
 163  */
 164
 165 /*
 166  * NAND
 167  */
 168
 169 #define CONFIG_MXC_NAND_REGS_BASE       0xD8000000
 170 #define CONFIG_SYS_NAND_BASE            CONFIG_MXC_NAND_REGS_BASE
 171 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 172
 173 #define CONFIG_MXC_NAND_HWECC
 174 #define CONFIG_SYS_NAND_LARGEPAGE
 175 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 176 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * 1024)
 177 #define CONFIG_SYS_NAND_PAGE_COUNT      CONFIG_SYS_NAND_BLOCK_SIZE / \
 178                                                 CONFIG_SYS_NAND_PAGE_SIZE
 179 #define CONFIG_SYS_NAND_SIZE            (256 * 1024 * 1024)
 180 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   11
 181 #define NAND_MAX_CHIPS                  1
 182
 183 #define CONFIG_FLASH_SHOW_PROGRESS      45
 184 #define CONFIG_SYS_NAND_QUIET           1
 185
 186 /*
 187  * Partitions & Filsystems
 188  */
 189 #define CONFIG_MTD_DEVICE
 190 #define CONFIG_MTD_PARTITIONS
 191
 192 /*
 193  * Ethernet (on SOC imx FEC)
 194  */
 195 #define CONFIG_FEC_MXC
 196 #define CONFIG_FEC_MXC_PHYADDR          0x1f
 197 #define CONFIG_MII                              /* MII PHY management   */
 198
 199 /*
 200  * FPGA
 201  */
 202 #define CONFIG_FPGA_COUNT               1
 203 #define CONFIG_FPGA_SPARTAN3
 204 #define CONFIG_SYS_FPGA_WAIT            250 /* 250 ms */
 205 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
 206 #define CONFIG_SYS_FPGA_CHECK_CTRLC
 207 #define CONFIG_SYS_FPGA_CHECK_ERROR
 208
 209 /*
 210  * Fuses - IIM
 211  */
 212 #ifdef CONFIG_CMD_IMX_FUSE
 213 #define IIM_MAC_BANK            0
 214 #define IIM_MAC_ROW             5
 215 #define IIM0_SCC_KEY            11
 216 #define IIM1_SUID               1
 217 #endif
 218
 219 /*
 220  * I2C
 221  */
 222
 223 #ifdef CONFIG_CMD_I2C
 224 #define CONFIG_SYS_I2C
 225 #define CONFIG_SYS_I2C_MXC
 226 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
 227 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
 228 #define CONFIG_SYS_MXC_I2C1_SPEED       100000  /* 100 kHz */
 229 #define CONFIG_SYS_MXC_I2C1_SLAVE       0x7F
 230 #define CONFIG_SYS_MXC_I2C2_SPEED       100000  /* 100 kHz */
 231 #define CONFIG_SYS_MXC_I2C2_SLAVE       0x7F
 232 #define CONFIG_SYS_I2C_NOPROBES         { }
 233
 234 #ifdef CONFIG_CMD_EEPROM
 235 # define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM 24LC02 */
 236 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* bytes of address */
 237 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       3
 238 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10      /* msec */
 239 #endif /* CONFIG_CMD_EEPROM */
 240 #endif /* CONFIG_CMD_I2C */
 241
 242 /*
 243  * SD/MMC
 244  */
 245 #ifdef CONFIG_CMD_MMC
 246 #define CONFIG_MXC_MCI_REGS_BASE        0x10014000
 247 #endif
 248
 249 /*
 250  * RTC
 251  */
 252 #ifdef CONFIG_CMD_DATE
 253 #define CONFIG_RTC_DS1374
 254 #define CONFIG_SYS_RTC_BUS_NUM          0
 255 #endif /* CONFIG_CMD_DATE */
 256
 257 /*
 258  * PLL
 259  *
 260  *  31 | x  |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0
 261  *     |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------|
 262  */
 263 #define CONFIG_MX27_CLK32               32768   /* 32768 or 32000 Hz crystal */
 264
 265 #if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */
 266 /* micron 64MB */
 267 #define PHYS_SDRAM_1_SIZE                       0x04000000 /* 64 MB */
 268 #define PHYS_SDRAM_2_SIZE                       0x04000000 /* 64 MB */
 269 #endif
 270
 271 #if (ACFG_SDRAM_MBYTE_SYZE == 128)
 272 /* micron 128MB */
 273 #define PHYS_SDRAM_1_SIZE                       0x08000000 /* 128 MB */
 274 #define PHYS_SDRAM_2_SIZE                       0x08000000 /* 128 MB */
 275 #endif
 276
 277 #if (ACFG_SDRAM_MBYTE_SYZE == 256)
 278 /* micron 256MB */
 279 #define PHYS_SDRAM_1_SIZE                       0x10000000 /* 256 MB */
 280 #define PHYS_SDRAM_2_SIZE                       0x10000000 /* 256 MB */
 281 #endif
 282
 283 #endif /* __CONFIG_H */