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1 /*
2 * (C) Copyright 2015
3 * (C) Copyright 2014
4 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
5 *
6 * Based on:
7 * Copyright (C) 2012 Freescale Semiconductor, Inc.
8 *
9 * Configuration settings for the Freescale i.MX6Q SabreSD board.
10 *
11 * SPDX-License-Identifier: GPL-2.0+
12 */
13 #ifndef __ARISTAINETOS_COMMON_CONFIG_H
14 #define __ARISTAINETOS_COMMON_CONFIG_H
15
16 #include "mx6_common.h"
17
18 #define CONFIG_MACH_TYPE 4501
19 #define CONFIG_MMCROOT "/dev/mmcblk0p1"
20 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
21
22 /* Size of malloc() pool */
23 #define CONFIG_SYS_MALLOC_LEN (64 * SZ_1M)
24
25 #define CONFIG_BOARD_EARLY_INIT_F
26
27 #define CONFIG_MXC_UART
28
29 #define CONFIG_CMD_FUSE
30 #define CONFIG_MXC_OCOTP
31
32 /* MMC Configs */
33 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
34
35 #define CONFIG_CMD_PING
36 #define CONFIG_CMD_DHCP
37 #define CONFIG_CMD_MII
38 #define CONFIG_CMD_NET
39 #define CONFIG_FEC_MXC
40 #define CONFIG_MII
41 #define IMX_FEC_BASE ENET_BASE_ADDR
42 #define CONFIG_ETHPRIME "FEC"
43 #define CONFIG_FEC_MXC_PHYADDR 0
44
45 #define CONFIG_PHYLIB
46 #define CONFIG_PHY_MICREL
47
48 #define CONFIG_CMD_SF
49 #define CONFIG_SPI_FLASH
50 #define CONFIG_SPI_FLASH_MTD
51 #define CONFIG_SPI_FLASH_STMICRO
52 #define CONFIG_MXC_SPI
53 #define CONFIG_SF_DEFAULT_BUS 3
54 #define CONFIG_SF_DEFAULT_SPEED 20000000
55 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
56 #define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
57
58 /* Command definition */
59 #define CONFIG_CMD_BMODE
60 #define CONFIG_CMD_SETEXPR
61
62 #define CONFIG_EXTRA_ENV_SETTINGS \
63 "script=u-boot.scr\0" \
64 "fit_file=/boot/system.itb\0" \
65 "loadaddr=0x12000000\0" \
66 "fit_addr_r=0x14000000\0" \
67 "uboot=/boot/u-boot.imx\0" \
68 "uboot_sz=d0000\0" \
69 "rescue_sys_addr=f0000\0" \
70 "rescue_sys_length=f10000\0" \
71 "panel=lb07wv8\0" \
72 "splashpos=m,m\0" \
73 "console=" CONFIG_CONSOLE_DEV "\0" \
74 "fdt_high=0xffffffff\0" \
75 "initrd_high=0xffffffff\0" \
76 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
77 "set_fit_default=fdt addr ${fit_addr_r};fdt set /configurations " \
78 "default ${board_type}\0" \
79 "get_env=mw ${loadaddr} 0 0x20000;" \
80 "mmc rescan;" \
81 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} env.txt;" \
82 "env import -t ${loadaddr}\0" \
83 "default_env=mw ${loadaddr} 0 0x20000;" \
84 "env export -t ${loadaddr} serial# ethaddr eth1addr " \
85 "board_type panel;" \
86 "env default -a;" \
87 "env import -t ${loadaddr}\0" \
88 "loadbootscript=" \
89 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
90 "bootscript=echo Running bootscript from mmc ...; " \
91 "source\0" \
92 "mmcpart=1\0" \
93 "mmcdev=0\0" \
94 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
95 "mmcargs=setenv bootargs console=${console},${baudrate} " \
96 "root=${mmcroot}\0" \
97 "mmcboot=echo Booting from mmc ...; " \
98 "run mmcargs addmtd addmisc set_fit_default;" \
99 "bootm ${fit_addr_r}\0" \
100 "mmc_load_fit=ext2load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
101 "${fit_file}\0" \
102 "mmc_load_uboot=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
103 "${uboot}\0" \
104 "mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \
105 "setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \
106 "setexpr uboot_maxsize ${uboot_sz} - 400;" \
107 "mw.b ${cmp_buf} 0x00 ${uboot_sz};" \
108 "run mmc_load_uboot;sf probe;sf erase 0 ${uboot_sz};" \
109 "sf write ${loadaddr} 400 ${filesize};" \
110 "sf read ${cmp_buf} 400 ${uboot_sz};" \
111 "cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \
112 "ubiboot=echo Booting from ubi ...; " \
113 "run ubiargs addmtd addmisc set_fit_default;" \
114 "bootm ${fit_addr_r}\0" \
115 "ubifs_load_fit=sf probe;ubi part ubi 2048;ubifsmount ubi:rootfs;" \
116 "ubifsload ${fit_addr_r} /boot/system.itb; " \
117 "imi ${fit_addr_r}\0 " \
118 "rescueargs=setenv bootargs console=${console},${baudrate} " \
119 "root=/dev/ram rw\0 " \
120 "rescueboot=echo Booting rescue system from NOR ...; " \
121 "run rescueargs addmtd addmisc set_fit_default;" \
122 "bootm ${fit_addr_r}\0" \
123 "rescue_load_fit=sf probe;sf read ${fit_addr_r} ${rescue_sys_addr} " \
124 "${rescue_sys_length}; imi ${fit_addr_r}\0" \
125 CONFIG_EXTRA_ENV_BOARD_SETTINGS
126
127 #define CONFIG_BOOTCOMMAND \
128 "mmc dev ${mmcdev};" \
129 "if mmc rescan; then " \
130 "if run loadbootscript; then " \
131 "run bootscript; " \
132 "else " \
133 "if run mmc_load_fit; then " \
134 "run mmcboot; " \
135 "else " \
136 "if run ubifs_load_fit; then " \
137 "run ubiboot; " \
138 "else " \
139 "if run rescue_load_fit; then " \
140 "run rescueboot; " \
141 "else " \
142 "echo RESCUE SYSTEM BOOT " \
143 "FAILURE;" \
144 "fi; " \
145 "fi; " \
146 "fi; " \
147 "fi; " \
148 "else " \
149 "if run ubifs_load_fit; then " \
150 "run ubiboot; " \
151 "else " \
152 "if run rescue_load_fit; then " \
153 "run rescueboot; " \
154 "else " \
155 "echo RESCUE SYSTEM BOOT FAILURE;" \
156 "fi; " \
157 "fi; " \
158 "fi"
159
160 #define CONFIG_ARP_TIMEOUT 200UL
161
162 /* Print Buffer Size */
163 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
164
165 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
166 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
167 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
168
169 #define CONFIG_STACKSIZE (128 * 1024)
170
171 /* Physical Memory Map */
172 #define CONFIG_NR_DRAM_BANKS 1
173 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
174
175 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
176 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
177 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
178
179 #define CONFIG_SYS_INIT_SP_OFFSET \
180 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
181 #define CONFIG_SYS_INIT_SP_ADDR \
182 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
183
184 /* Environment organization */
185 #define CONFIG_ENV_SIZE (12 * 1024)
186 #define CONFIG_ENV_IS_IN_SPI_FLASH
187 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
188 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
189 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
190 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
191 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
192 #define CONFIG_ENV_SECT_SIZE (0x010000)
193 #define CONFIG_ENV_OFFSET (0x0d0000)
194 #define CONFIG_ENV_OFFSET_REDUND (0x0e0000)
195
196 #define CONFIG_SYS_FSL_USDHC_NUM 2
197
198 /* I2C */
199 #define CONFIG_CMD_I2C
200 #define CONFIG_SYS_I2C
201 #define CONFIG_SYS_I2C_MXC
202 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
203 #define CONFIG_SYS_I2C_SPEED 100000
204 #define CONFIG_SYS_I2C_SLAVE 0x7f
205 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x00} }
206
207 /* NAND stuff */
208 #define CONFIG_CMD_NAND
209 #define CONFIG_CMD_NAND_TRIMFFS
210 #define CONFIG_NAND_MXS
211 #define CONFIG_SYS_MAX_NAND_DEVICE 1
212 #define CONFIG_SYS_NAND_BASE 0x40000000
213 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
214 #define CONFIG_SYS_NAND_ONFI_DETECTION
215
216 /* DMA stuff, needed for GPMI/MXS NAND support */
217 #define CONFIG_APBH_DMA
218 #define CONFIG_APBH_DMA_BURST
219 #define CONFIG_APBH_DMA_BURST8
220
221 /* RTC */
222 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
223 #define CONFIG_SYS_RTC_BUS_NUM 2
224 #define CONFIG_RTC_M41T11
225 #define CONFIG_CMD_DATE
226
227 /* USB Configs */
228 #define CONFIG_CMD_USB
229 #define CONFIG_USB_EHCI
230 #define CONFIG_USB_EHCI_MX6
231 #define CONFIG_USB_STORAGE
232 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
233 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
234 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
235 #define CONFIG_MXC_USB_FLAGS 0
236
237 /* UBI support */
238 #define CONFIG_LZO
239 #define CONFIG_CMD_MTDPARTS
240 #define CONFIG_MTD_PARTITIONS
241 #define CONFIG_MTD_DEVICE
242 #define CONFIG_RBTREE
243 #define CONFIG_CMD_UBI
244 #define CONFIG_CMD_UBIFS
245
246 #define CONFIG_MTD_UBI_FASTMAP
247 #define CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT 1
248
249 #define CONFIG_HW_WATCHDOG
250 #define CONFIG_IMX_WATCHDOG
251
252 #define CONFIG_FIT
253
254 /* Framebuffer */
255 #define CONFIG_VIDEO
256 #define CONFIG_VIDEO_IPUV3
257 /* check this console not needed, after test remove it */
258 #define CONFIG_CFB_CONSOLE
259 #define CONFIG_VGA_AS_SINGLE_DEVICE
260 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
261 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
262 #define CONFIG_VIDEO_BMP_RLE8
263 #define CONFIG_SPLASH_SCREEN
264 #define CONFIG_SPLASH_SCREEN_ALIGN
265 #define CONFIG_BMP_16BPP
266 #define CONFIG_VIDEO_LOGO
267 #define CONFIG_VIDEO_BMP_LOGO
268 #define CONFIG_IPUV3_CLK 198000000
269 #define CONFIG_IMX_VIDEO_SKIP
270
271 #define CONFIG_CMD_BMP
272
273 #define CONFIG_PWM_IMX
274 #define CONFIG_IMX6_PWM_PER_CLK 66000000
275
276 #endif /* __ARISTAINETOS_COMMON_CONFIG_H */