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1 /*
2 * (C) Copyright 2015
3 * (C) Copyright 2014
4 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
5 *
6 * Based on:
7 * Copyright (C) 2012 Freescale Semiconductor, Inc.
8 *
9 * Configuration settings for the Freescale i.MX6Q SabreSD board.
10 *
11 * SPDX-License-Identifier: GPL-2.0+
12 */
13 #ifndef __ARISTAINETOS_COMMON_CONFIG_H
14 #define __ARISTAINETOS_COMMON_CONFIG_H
15
16 #include "mx6_common.h"
17
18 #define CONFIG_MACH_TYPE 4501
19 #define CONFIG_MMCROOT "/dev/mmcblk0p1"
20
21 /* Size of malloc() pool */
22 #define CONFIG_SYS_MALLOC_LEN (64 * SZ_1M)
23
24 #define CONFIG_MXC_UART
25
26 /* MMC Configs */
27 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
28
29 #define CONFIG_FEC_MXC
30 #define CONFIG_MII
31 #define IMX_FEC_BASE ENET_BASE_ADDR
32 #define CONFIG_ETHPRIME "FEC"
33 #define CONFIG_FEC_MXC_PHYADDR 0
34
35 #define CONFIG_PHYLIB
36 #define CONFIG_PHY_MICREL
37
38 #define CONFIG_SPI_FLASH_MTD
39 #define CONFIG_MXC_SPI
40 #define CONFIG_SF_DEFAULT_SPEED 20000000
41 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
42 #define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
43
44 #define CONFIG_EXTRA_ENV_SETTINGS \
45 "script=u-boot.scr\0" \
46 "fit_file=/boot/system.itb\0" \
47 "loadaddr=0x12000000\0" \
48 "fit_addr_r=0x14000000\0" \
49 "uboot=/boot/u-boot.imx\0" \
50 "uboot_sz=d0000\0" \
51 "rescue_sys_addr=f0000\0" \
52 "rescue_sys_length=f10000\0" \
53 "panel=lb07wv8\0" \
54 "splashpos=m,m\0" \
55 "console=" CONSOLE_DEV "\0" \
56 "fdt_high=0xffffffff\0" \
57 "initrd_high=0xffffffff\0" \
58 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
59 "set_fit_default=fdt addr ${fit_addr_r};fdt set /configurations " \
60 "default ${board_type}\0" \
61 "get_env=mw ${loadaddr} 0 0x20000;" \
62 "mmc rescan;" \
63 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} env.txt;" \
64 "env import -t ${loadaddr}\0" \
65 "default_env=mw ${loadaddr} 0 0x20000;" \
66 "env export -t ${loadaddr} serial# ethaddr eth1addr " \
67 "board_type panel;" \
68 "env default -a;" \
69 "env import -t ${loadaddr}\0" \
70 "loadbootscript=" \
71 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
72 "bootscript=echo Running bootscript from mmc ...; " \
73 "source\0" \
74 "mmcpart=1\0" \
75 "mmcdev=0\0" \
76 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
77 "mmcargs=setenv bootargs console=${console},${baudrate} " \
78 "root=${mmcroot}\0" \
79 "mmcboot=echo Booting from mmc ...; " \
80 "run mmcargs addmtd addmisc set_fit_default;" \
81 "bootm ${fit_addr_r}\0" \
82 "mmc_load_fit=ext2load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
83 "${fit_file}\0" \
84 "mmc_load_uboot=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
85 "${uboot}\0" \
86 "mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \
87 "setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \
88 "setexpr uboot_maxsize ${uboot_sz} - 400;" \
89 "mw.b ${cmp_buf} 0x00 ${uboot_sz};" \
90 "run mmc_load_uboot;sf probe;sf erase 0 ${uboot_sz};" \
91 "sf write ${loadaddr} 400 ${filesize};" \
92 "sf read ${cmp_buf} 400 ${uboot_sz};" \
93 "cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \
94 "ubiboot=echo Booting from ubi ...; " \
95 "run ubiargs addmtd addmisc set_fit_default;" \
96 "bootm ${fit_addr_r}\0" \
97 "rescueargs=setenv bootargs console=${console},${baudrate} " \
98 "root=/dev/ram rw\0 " \
99 "rescueboot=echo Booting rescue system from NOR ...; " \
100 "run rescueargs addmtd addmisc set_fit_default;" \
101 "bootm ${fit_addr_r}\0" \
102 "rescue_load_fit=sf probe;sf read ${fit_addr_r} ${rescue_sys_addr} " \
103 "${rescue_sys_length}; imi ${fit_addr_r}\0" \
104 CONFIG_EXTRA_ENV_BOARD_SETTINGS
105
106 #define CONFIG_BOOTCOMMAND \
107 "mmc dev ${mmcdev};" \
108 "if mmc rescan; then " \
109 "if run loadbootscript; then " \
110 "run bootscript; " \
111 "else " \
112 "if run mmc_load_fit; then " \
113 "run mmcboot; " \
114 "else " \
115 "if run ubifs_load_fit; then " \
116 "run ubiboot; " \
117 "else " \
118 "if run rescue_load_fit; then " \
119 "run rescueboot; " \
120 "else " \
121 "echo RESCUE SYSTEM BOOT " \
122 "FAILURE;" \
123 "fi; " \
124 "fi; " \
125 "fi; " \
126 "fi; " \
127 "else " \
128 "if run ubifs_load_fit; then " \
129 "run ubiboot; " \
130 "else " \
131 "if run rescue_load_fit; then " \
132 "run rescueboot; " \
133 "else " \
134 "echo RESCUE SYSTEM BOOT FAILURE;" \
135 "fi; " \
136 "fi; " \
137 "fi"
138
139 #define CONFIG_ARP_TIMEOUT 200UL
140
141 /* Print Buffer Size */
142 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
143
144 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
145 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
146 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
147
148 /* Physical Memory Map */
149 #define CONFIG_NR_DRAM_BANKS 1
150 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
151
152 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
153 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
154 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
155
156 #define CONFIG_SYS_INIT_SP_OFFSET \
157 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
158 #define CONFIG_SYS_INIT_SP_ADDR \
159 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
160
161 /* Environment organization */
162 #define CONFIG_ENV_SIZE (12 * 1024)
163 #define CONFIG_ENV_IS_IN_SPI_FLASH
164 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
165 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
166 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
167 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
168 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
169 #define CONFIG_ENV_SECT_SIZE (0x010000)
170 #define CONFIG_ENV_OFFSET (0x0d0000)
171 #define CONFIG_ENV_OFFSET_REDUND (0x0e0000)
172
173 #define CONFIG_SYS_FSL_USDHC_NUM 2
174
175 /* I2C */
176 #define CONFIG_SYS_I2C
177 #define CONFIG_SYS_I2C_MXC
178 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
179 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
180 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
181 #define CONFIG_SYS_I2C_SPEED 100000
182 #define CONFIG_SYS_I2C_SLAVE 0x7f
183 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x00} }
184
185 /* NAND stuff */
186 #define CONFIG_CMD_NAND
187 #define CONFIG_CMD_NAND_TRIMFFS
188 #define CONFIG_NAND_MXS
189 #define CONFIG_SYS_MAX_NAND_DEVICE 1
190 #define CONFIG_SYS_NAND_BASE 0x40000000
191 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
192 #define CONFIG_SYS_NAND_ONFI_DETECTION
193
194 /* DMA stuff, needed for GPMI/MXS NAND support */
195 #define CONFIG_APBH_DMA
196 #define CONFIG_APBH_DMA_BURST
197 #define CONFIG_APBH_DMA_BURST8
198
199 /* RTC */
200 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
201 #define CONFIG_SYS_RTC_BUS_NUM 2
202 #define CONFIG_RTC_M41T11
203 #define CONFIG_CMD_DATE
204
205 /* USB Configs */
206 #define CONFIG_USB_EHCI
207 #define CONFIG_USB_EHCI_MX6
208 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
209 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
210 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
211 #define CONFIG_MXC_USB_FLAGS 0
212
213 /* UBI support */
214 #define CONFIG_LZO
215 #define CONFIG_CMD_MTDPARTS
216 #define CONFIG_MTD_PARTITIONS
217 #define CONFIG_MTD_DEVICE
218 #define CONFIG_RBTREE
219 #define CONFIG_CMD_UBIFS
220
221 #define CONFIG_HW_WATCHDOG
222 #define CONFIG_IMX_WATCHDOG
223
224 /* Framebuffer */
225 #define CONFIG_VIDEO_IPUV3
226 /* check this console not needed, after test remove it */
227 #define CONFIG_VIDEO_BMP_RLE8
228 #define CONFIG_SPLASH_SCREEN
229 #define CONFIG_SPLASH_SCREEN_ALIGN
230 #define CONFIG_BMP_16BPP
231 #define CONFIG_VIDEO_LOGO
232 #define CONFIG_VIDEO_BMP_LOGO
233 #define CONFIG_IPUV3_CLK 198000000
234 #define CONFIG_IMX_VIDEO_SKIP
235
236 #define CONFIG_PWM_IMX
237 #define CONFIG_IMX6_PWM_PER_CLK 66000000
238
239 #endif /* __ARISTAINETOS_COMMON_CONFIG_H */