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1 /*
2 * Configuration settings for the Sentec Cobra Board.
3 *
4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 /*
10 * configuration for ASTRO "Urmel" board.
11 * Originating from Cobra5272 configuration, messed up by
12 * Wolfgang Wegner <w.wegner@astro-kom.de>
13 * Please do not bother the original author with bug reports
14 * concerning this file.
15 */
16
17 #ifndef _CONFIG_ASTRO_MCF5373L_H
18 #define _CONFIG_ASTRO_MCF5373L_H
19
20 #include <linux/stringify.h>
21
22 /*
23 * set the card type to actually compile for; either of
24 * the possibilities listed below has to be used!
25 */
26 #define CONFIG_ASTRO_V532 1
27
28 #if CONFIG_ASTRO_V532
29 #define ASTRO_ID 0xF8
30 #elif CONFIG_ASTRO_V512
31 #define ASTRO_ID 0xFA
32 #elif CONFIG_ASTRO_TWIN7S2
33 #define ASTRO_ID 0xF9
34 #elif CONFIG_ASTRO_V912
35 #define ASTRO_ID 0xFC
36 #elif CONFIG_ASTRO_COFDMDUOS2
37 #define ASTRO_ID 0xFB
38 #else
39 #error No card type defined!
40 #endif
41
42 #define CONFIG_ASTRO5373L /* define board type */
43
44 /* Command line configuration */
45 /*
46 * CONFIG_RAM defines if u-boot is loaded via BDM (or started from
47 * a different bootloader that has already performed RAM setup) or
48 * started directly from flash, which is the regular case for production
49 * boards.
50 */
51 #ifdef CONFIG_RAM
52 #define CONFIG_MONITOR_IS_IN_RAM
53 #define CONFIG_SYS_TEXT_BASE 0x40020000
54 #define ENABLE_JFFS 0
55 #else
56 #define CONFIG_SYS_TEXT_BASE 0x00000000
57 #define ENABLE_JFFS 1
58 #endif
59
60 /* Define which commands should be available at u-boot command prompt */
61
62 #if ENABLE_JFFS
63 #define CONFIG_CMD_JFFS2
64 #endif
65 #define CONFIG_CMD_REGINFO
66 #define CONFIG_CMD_FPGA_LOADMK
67 #define CONFIG_CMDLINE_EDITING
68
69 #define CONFIG_MCFRTC
70 #undef RTC_DEBUG
71
72 /* Timer */
73 #define CONFIG_MCFTMR
74 #undef CONFIG_MCFPIT
75
76 /* I2C */
77 #define CONFIG_SYS_I2C
78 #define CONFIG_SYS_I2C_FSL
79 #define CONFIG_SYS_FSL_I2C_SPEED 80000
80 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
81 #define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
82 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
83
84 /*
85 * Defines processor clock - important for correct timings concerning serial
86 * interface etc.
87 */
88
89 #define CONFIG_SYS_CLK 80000000
90 #define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3)
91 #define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */
92
93 #define CONFIG_SYS_CORE_SRAM_SIZE 0x8000
94 #define CONFIG_SYS_CORE_SRAM 0x80000000
95
96 #define CONFIG_SYS_UNIFY_CACHE
97
98 /*
99 * Define baudrate for UART1 (console output, tftp, ...)
100 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
101 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected
102 * in u-boot command interface
103 */
104
105 #define CONFIG_MCFUART
106 #define CONFIG_SYS_UART_PORT (2)
107 #define CONFIG_SYS_UART2_ALT3_GPIO
108
109 /*
110 * Watchdog configuration; Watchdog is disabled for running from RAM
111 * and set to highest possible value else. Beware there is no check
112 * in the watchdog code to validate the timeout value set here!
113 */
114
115 #ifndef CONFIG_MONITOR_IS_IN_RAM
116 #define CONFIG_WATCHDOG
117 #define CONFIG_WATCHDOG_TIMEOUT 3355 /* timeout in milliseconds */
118 #endif
119
120 /*
121 * Configuration for environment
122 * Environment is located in the last sector of the flash
123 */
124
125 #ifndef CONFIG_MONITOR_IS_IN_RAM
126 #define CONFIG_ENV_OFFSET 0x1FF8000
127 #define CONFIG_ENV_SECT_SIZE 0x8000
128 #define CONFIG_ENV_IS_IN_FLASH 1
129 #else
130 /*
131 * environment in RAM - This is used to use a single PC-based application
132 * to load an image, load U-Boot, load an environment and then start U-Boot
133 * to execute the commands from the environment. Feedback is done via setting
134 * and reading memory locations.
135 */
136 #define CONFIG_ENV_ADDR 0x40060000
137 #define CONFIG_ENV_SECT_SIZE 0x8000
138 #define CONFIG_ENV_IS_IN_FLASH 1
139 #endif
140
141 /* here we put our FPGA configuration... */
142 #define CONFIG_MISC_INIT_R 1
143
144 /* Define user parameters that have to be customized most likely */
145
146 /* AUTOBOOT settings - booting images automatically by u-boot after power on */
147
148 /*
149 * The following settings will be contained in the environment block ; if you
150 * want to use a neutral environment all those settings can be manually set in
151 * u-boot: 'set' command
152 */
153
154 #define CONFIG_EXTRA_ENV_SETTINGS \
155 "loaderversion=11\0" \
156 "card_id="__stringify(ASTRO_ID)"\0" \
157 "alterafile=0\0" \
158 "xilinxfile=0\0" \
159 "xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\
160 "fpga load 0 0x41000000 $filesize\0" \
161 "alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\
162 "fpga load 1 0x41000000 $filesize\0" \
163 "env_default=1\0" \
164 "env_check=if test $env_default -eq 1;"\
165 " then setenv env_default 0;saveenv;fi\0"
166
167 /*
168 * "update" is a non-standard command that has to be supplied
169 * by external update.c; This is not included in mainline because
170 * it needs non-blocking CFI routines.
171 */
172 #ifdef CONFIG_MONITOR_IS_IN_RAM
173 #define CONFIG_BOOTCOMMAND "" /* no autoboot in this case */
174 #else
175 #if CONFIG_ASTRO_V532
176 #define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\
177 "run xilinxload&&run alteraload&&bootm 0x80000;"\
178 "update;reset"
179 #else
180 #define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\
181 "run xilinxload&&bootm 0x80000;update;reset"
182 #endif
183 #endif
184
185 /* default bootargs that are considered during boot */
186 #define CONFIG_BOOTARGS " console=ttyS2,115200 rootfstype=romfs"\
187 " loaderversion=$loaderversion"
188
189 /* default RAM address for user programs */
190 #define CONFIG_SYS_LOAD_ADDR 0x20000
191
192 #define CONFIG_SYS_LONGHELP
193
194 #if (CONFIG_COMMANDS & CONFIG_CMD_KGDB)
195 #define CONFIG_SYS_CBSIZE 1024
196 #else
197 #define CONFIG_SYS_CBSIZE 256
198 #endif
199 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
200 #define CONFIG_SYS_MAXARGS 16
201 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
202
203 #define CONFIG_FPGA_COUNT 1
204 #define CONFIG_FPGA
205 #define CONFIG_FPGA_XILINX
206 #define CONFIG_FPGA_SPARTAN3
207 #define CONFIG_FPGA_ALTERA
208 #define CONFIG_FPGA_CYCLON2
209 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
210 #define CONFIG_SYS_FPGA_WAIT 1000
211
212 /* End of user parameters to be customized */
213
214 /* Defines memory range for test */
215
216 #define CONFIG_SYS_MEMTEST_START 0x40020000
217 #define CONFIG_SYS_MEMTEST_END 0x41ffffff
218
219 /*
220 * Low Level Configuration Settings
221 * (address mappings, register initial values, etc.)
222 * You should know what you are doing if you make changes here.
223 */
224
225 /* Base register address */
226
227 #define CONFIG_SYS_MBAR 0xFC000000 /* Register Base Addrs */
228
229 /* System Conf. Reg. & System Protection Reg. */
230
231 #define CONFIG_SYS_SCR 0x0003;
232 #define CONFIG_SYS_SPR 0xffff;
233
234 /*
235 * Definitions for initial stack pointer and data area (in internal SRAM)
236 */
237 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
238 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000
239 #define CONFIG_SYS_INIT_RAM_CTRL 0x221
240 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
241 GENERATED_GBL_DATA_SIZE)
242 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
243
244 /*
245 * Start addresses for the final memory configuration
246 * (Set up by the startup code)
247 * for MCF5373, the allowable range is 0x40000000 to 0x7FF00000
248 */
249 #define CONFIG_SYS_SDRAM_BASE 0x40000000
250
251 /*
252 * Chipselect bank definitions
253 *
254 * CS0 - Flash 32MB (first 16MB)
255 * CS1 - Flash 32MB (second half)
256 * CS2 - FPGA
257 * CS3 - FPGA
258 * CS4 - unused
259 * CS5 - unused
260 */
261 #define CONFIG_SYS_CS0_BASE 0
262 #define CONFIG_SYS_CS0_MASK 0x00ff0001
263 #define CONFIG_SYS_CS0_CTRL 0x00001fc0
264
265 #define CONFIG_SYS_CS1_BASE 0x01000000
266 #define CONFIG_SYS_CS1_MASK 0x00ff0001
267 #define CONFIG_SYS_CS1_CTRL 0x00001fc0
268
269 #define CONFIG_SYS_CS2_BASE 0x20000000
270 #define CONFIG_SYS_CS2_MASK 0x00ff0001
271 #define CONFIG_SYS_CS2_CTRL 0x0000fec0
272
273 #define CONFIG_SYS_CS3_BASE 0x21000000
274 #define CONFIG_SYS_CS3_MASK 0x00ff0001
275 #define CONFIG_SYS_CS3_CTRL 0x0000fec0
276
277 #define CONFIG_SYS_FLASH_BASE 0x00000000
278
279 #ifdef CONFIG_MONITOR_IS_IN_RAM
280 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
281 #else
282 /* This is mainly used during relocation in start.S */
283 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
284 #endif
285 /* Reserve 256 kB for Monitor */
286 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
287
288 #define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024)
289 /* Reserve 128 kB for malloc() */
290 #define CONFIG_SYS_MALLOC_LEN (128 << 10)
291
292 /*
293 * For booting Linux, the board info and command line data
294 * have to be in the first 8 MB of memory, since this is
295 * the maximum mapped by the Linux kernel during initialization ??
296 */
297 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \
298 (CONFIG_SYS_SDRAM_SIZE << 20))
299
300 /* FLASH organization */
301 #define CONFIG_SYS_MAX_FLASH_BANKS 1
302 #define CONFIG_SYS_MAX_FLASH_SECT 259
303 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000
304
305 #define CONFIG_SYS_FLASH_CFI 1
306 #define CONFIG_FLASH_CFI_DRIVER 1
307 #define CONFIG_SYS_FLASH_SIZE 0x2000000
308 #define CONFIG_SYS_FLASH_PROTECTION 1
309 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
310 #define CONFIG_SYS_FLASH_CFI_NONBLOCK 1
311
312 #define LDS_BOARD_TEXT \
313 . = DEFINED(env_offset) ? env_offset : .; \
314 common/env_embedded.o (.text*)
315
316 #if ENABLE_JFFS
317 /* JFFS Partition offset set */
318 #define CONFIG_SYS_JFFS2_FIRST_BANK 0
319 #define CONFIG_SYS_JFFS2_NUM_BANKS 1
320 /* 512k reserved for u-boot */
321 #define CONFIG_SYS_JFFS2_FIRST_SECTOR 0x40
322 #endif
323
324 /* Cache Configuration */
325 #define CONFIG_SYS_CACHELINE_SIZE 16
326
327 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
328 CONFIG_SYS_INIT_RAM_SIZE - 8)
329 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
330 CONFIG_SYS_INIT_RAM_SIZE - 4)
331 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA)
332 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
333 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
334 CF_ACR_EN | CF_ACR_SM_ALL)
335 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \
336 CF_CACR_DCM_P)
337
338 #endif /* _CONFIG_ASTRO_MCF5373L_H */