include/configs/at91cap9adk.h

   1 /*
   2  * (C) Copyright 2007-2008
   3  * Stelian Pop <stelian.pop@leadtechdesign.com>
   4  * Lead Tech Design <www.leadtechdesign.com>
   5  *
   6  * Configuation settings for the AT91CAP9ADK board.
   7  *
   8  * See file CREDITS for list of people who contributed to this
   9  * project.
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation; either version 2 of
  14  * the License, or (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24  * MA 02111-1307 USA
  25  */
  26
  27 #ifndef __CONFIG_H
  28 #define __CONFIG_H
  29
  30 /* ARM asynchronous clock */
  31 #define AT91_MAIN_CLOCK         200000000       /* from 12 MHz crystal */
  32 #define AT91_MASTER_CLOCK       100000000       /* peripheral = main / 2 */
  33 #define CFG_HZ                  1000000         /* 1us resolution */
  34
  35 #define AT91_SLOW_CLOCK         32768   /* slow clock */
  36
  37 #define CONFIG_ARM926EJS        1       /* This is an ARM926EJS Core    */
  38 #define CONFIG_AT91CAP9         1       /* It's an Atmel AT91CAP9 SoC   */
  39 #define CONFIG_AT91CAP9ADK      1       /* on an AT91CAP9ADK Board      */
  40 #undef CONFIG_USE_IRQ                   /* we don't need IRQ/FIQ stuff  */
  41
  42 #define CONFIG_CMDLINE_TAG      1       /* enable passing of ATAGs      */
  43 #define CONFIG_SETUP_MEMORY_TAGS 1
  44 #define CONFIG_INITRD_TAG       1
  45
  46 #define CONFIG_SKIP_LOWLEVEL_INIT
  47 #define CONFIG_SKIP_RELOCATE_UBOOT
  48
  49 /*
  50  * Hardware drivers
  51  */
  52 #define CONFIG_ATMEL_USART      1
  53 #undef CONFIG_USART0
  54 #undef CONFIG_USART1
  55 #undef CONFIG_USART2
  56 #define CONFIG_USART3           1       /* USART 3 is DBGU */
  57
  58 #define CONFIG_BOOTDELAY        3
  59 #define CONFIG_BOOTARGS         "console=ttyS0,115200 " \
  60                                 "root=/dev/mtdblock1 rw rootfstype=jffs2"
  61
  62 /* #define CONFIG_ENV_OVERWRITE 1 */
  63
  64 /*
  65  * BOOTP options
  66  */
  67 #define CONFIG_BOOTP_BOOTFILESIZE       1
  68 #define CONFIG_BOOTP_BOOTPATH           1
  69 #define CONFIG_BOOTP_GATEWAY            1
  70 #define CONFIG_BOOTP_HOSTNAME           1
  71
  72 /*
  73  * Command line configuration.
  74  */
  75 #include <config_cmd_default.h>
  76 #undef CONFIG_CMD_BDI
  77 #undef CONFIG_CMD_IMI
  78 #undef CONFIG_CMD_AUTOSCRIPT
  79 #undef CONFIG_CMD_FPGA
  80 #undef CONFIG_CMD_LOADS
  81
  82 #define CONFIG_CMD_PING         1
  83 #define CONFIG_CMD_DHCP         1
  84 #define CONFIG_CMD_NAND         1
  85 #define CONFIG_CMD_USB          1
  86
  87 /* SDRAM: Careful: this supposes an AT91CAP-MEM33 expansion card */
  88 #define CONFIG_NR_DRAM_BANKS            1
  89 #define PHYS_SDRAM                      0x70000000
  90 #define PHYS_SDRAM_SIZE                 0x04000000      /* 64 megs */
  91
  92 /* DataFlash */
  93 #define CONFIG_HAS_DATAFLASH            1
  94 #define CFG_SPI_WRITE_TOUT              (5*CFG_HZ)
  95 #define CFG_MAX_DATAFLASH_BANKS         1
  96 #define CFG_DATAFLASH_LOGIC_ADDR_CS0    0xC0000000      /* CS0 */
  97 #define AT91_SPI_CLK                    20000000
  98 #define DATAFLASH_TCSS                  (0xFA << 16)
  99 #define DATAFLASH_TCHS                  (0x8 << 24)
 100
 101 /* NOR flash */
 102 #define CFG_FLASH_CFI                   1
 103 #define CFG_FLASH_CFI_DRIVER            1
 104 #define PHYS_FLASH_1                    0x10000000
 105 #define CFG_FLASH_BASE                  PHYS_FLASH_1
 106 #define CFG_MAX_FLASH_SECT              256
 107 #define CFG_MAX_FLASH_BANKS             1
 108
 109 /* NAND flash */
 110 #define NAND_MAX_CHIPS                  1
 111 #define CFG_MAX_NAND_DEVICE             1
 112 #define CFG_NAND_BASE                   0x40000000
 113 #define CFG_NAND_DBW_8                  1
 114
 115 /* Ethernet */
 116 #define CONFIG_MACB                     1
 117 #define CONFIG_RMII                     1
 118 #define CONFIG_NET_MULTI                1
 119 #define CONFIG_NET_RETRY_COUNT          20
 120 #define CONFIG_RESET_PHY_R              1
 121
 122 /* USB */
 123 #define CONFIG_USB_OHCI_NEW             1
 124 #define LITTLEENDIAN                    1
 125 #define CONFIG_DOS_PARTITION            1
 126 #define CFG_USB_OHCI_CPU_INIT           1
 127 #define CFG_USB_OHCI_REGS_BASE          0x00700000      /* AT91_BASE_UHP */
 128 #define CFG_USB_OHCI_SLOT_NAME          "at91cap9"
 129 #define CFG_USB_OHCI_MAX_ROOT_PORTS     2
 130
 131 #define CFG_LOAD_ADDR                   0x72000000      /* load address */
 132
 133 #define CFG_MEMTEST_START               PHYS_SDRAM
 134 #define CFG_MEMTEST_END                 0x73e00000
 135
 136 #define CFG_USE_DATAFLASH               1
 137 #undef CFG_USE_NORFLASH
 138
 139 #ifdef CFG_USE_DATAFLASH
 140
 141 /* bootstrap + u-boot + env + linux in dataflash */
 142 #define CFG_ENV_IS_IN_DATAFLASH 1
 143 #define CFG_MONITOR_BASE        (CFG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
 144 #define CFG_ENV_OFFSET          0x4200
 145 #define CFG_ENV_ADDR            (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET)
 146 #define CFG_ENV_SIZE            0x4200
 147 #define CONFIG_BOOTCOMMAND      "cp.b 0xC003DE00 0x72000000 0x200040; bootm"
 148
 149 #else
 150
 151 /* bootstrap + u-boot + env + linux in norflash */
 152 #define CFG_ENV_IS_IN_FLASH     1
 153 #define CFG_MONITOR_BASE        (PHYS_FLASH_1 + 0x8000)
 154 #define CFG_ENV_OFFSET          0x4000
 155 #define CFG_ENV_ADDR            (PHYS_FLASH_1 + CFG_ENV_OFFSET)
 156 #define CFG_ENV_SIZE            0x4000
 157 #define CONFIG_BOOTCOMMAND      "cp.b 0x10040000 0x72000000 0x200000; bootm"
 158
 159 #endif
 160
 161 #define CONFIG_BAUDRATE         115200
 162 #define CFG_BAUDRATE_TABLE      {115200 , 19200, 38400, 57600, 9600 }
 163
 164 #define CFG_PROMPT              "U-Boot> "
 165 #define CFG_CBSIZE              256
 166 #define CFG_MAXARGS             16
 167 #define CFG_PBSIZE              (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
 168 #define CFG_LONGHELP            1
 169 #define CONFIG_CMDLINE_EDITING  1
 170
 171 #define ROUND(A, B)             (((A) + (B)) & ~((B) - 1))
 172 /*
 173  * Size of malloc() pool
 174  */
 175 #define CFG_MALLOC_LEN          ROUND(CFG_ENV_SIZE + 128*1024, 0x1000)
 176 #define CFG_GBL_DATA_SIZE       128     /* 128 bytes for initial data */
 177
 178 #define CONFIG_STACKSIZE        (32*1024)       /* regular stack */
 179
 180 #ifdef CONFIG_USE_IRQ
 181 #error CONFIG_USE_IRQ not supported
 182 #endif
 183
 184 #endif