include/configs/at91sam9261ek.h

   1 /*
   2  * (C) Copyright 2007-2008
   3  * Stelian Pop <stelian@popies.net>
   4  * Lead Tech Design <www.leadtechdesign.com>
   5  *
   6  * Configuation settings for the AT91SAM9261EK board.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #ifndef __CONFIG_H
  12 #define __CONFIG_H
  13
  14 /* ARM asynchronous clock */
  15 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768           /* slow clock xtal */
  16 #define CONFIG_SYS_AT91_MAIN_CLOCK      18432000        /* 18.432 MHz crystal */
  17
  18 #ifdef CONFIG_AT91SAM9G10
  19 #define CONFIG_AT91SAM9G10EK            /* It's an Atmel AT91SAM9G10 EK*/
  20 #else
  21 #define CONFIG_AT91SAM9261EK            /* It's an Atmel AT91SAM9261 EK*/
  22 #endif
  23
  24 #include <asm/hardware.h>
  25
  26 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
  27 #define CONFIG_SETUP_MEMORY_TAGS
  28 #define CONFIG_INITRD_TAG
  29
  30 #define CONFIG_SKIP_LOWLEVEL_INIT
  31
  32 #define CONFIG_DISPLAY_CPUINFO
  33
  34 #define CONFIG_ATMEL_LEGACY
  35 #define CONFIG_SYS_TEXT_BASE            0x21f00000
  36
  37 /*
  38  * Hardware drivers
  39  */
  40
  41 /* gpio */
  42 #define CONFIG_AT91_GPIO
  43 #define CONFIG_AT91_GPIO_PULLUP         1
  44
  45 /* serial console */
  46 #define CONFIG_ATMEL_USART
  47 #define CONFIG_USART_BASE               ATMEL_BASE_DBGU
  48 #define CONFIG_USART_ID                 ATMEL_ID_SYS
  49 #define CONFIG_BAUDRATE                 115200
  50
  51 /* LCD */
  52 #define CONFIG_LCD
  53 #define LCD_BPP                         LCD_COLOR8
  54 #define CONFIG_LCD_LOGO
  55 #undef LCD_TEST_PATTERN
  56 #define CONFIG_LCD_INFO
  57 #define CONFIG_LCD_INFO_BELOW_LOGO
  58 #define CONFIG_SYS_WHITE_ON_BLACK
  59 #define CONFIG_ATMEL_LCD
  60 #ifdef CONFIG_AT91SAM9261EK
  61 #define CONFIG_ATMEL_LCD_BGR555
  62 #endif
  63
  64 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
  65
  66 /* LED */
  67 #define CONFIG_AT91_LED
  68 #define CONFIG_RED_LED          AT91_PIN_PA23   /* this is the power led */
  69 #define CONFIG_GREEN_LED        AT91_PIN_PA13   /* this is the user1 led */
  70 #define CONFIG_YELLOW_LED       AT91_PIN_PA14   /* this is the user2 led */
  71
  72
  73 /*
  74  * BOOTP options
  75  */
  76 #define CONFIG_BOOTP_BOOTFILESIZE
  77 #define CONFIG_BOOTP_BOOTPATH
  78 #define CONFIG_BOOTP_GATEWAY
  79 #define CONFIG_BOOTP_HOSTNAME
  80
  81 /*
  82  * Command line configuration.
  83  */
  84 #define CONFIG_CMD_NAND
  85
  86 /* SDRAM */
  87 #define CONFIG_NR_DRAM_BANKS            1
  88 #define CONFIG_SYS_SDRAM_BASE           0x20000000
  89 #define CONFIG_SYS_SDRAM_SIZE           0x04000000
  90 #define CONFIG_SYS_INIT_SP_ADDR \
  91         (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
  92
  93 /* DataFlash */
  94 #define CONFIG_ATMEL_DATAFLASH_SPI
  95 #define CONFIG_HAS_DATAFLASH
  96 #define CONFIG_SYS_MAX_DATAFLASH_BANKS          2
  97 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0     0xC0000000      /* CS0 */
  98 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3     0xD0000000      /* CS3 */
  99 #define AT91_SPI_CLK                            15000000
 100 #define DATAFLASH_TCSS                          (0x1a << 16)
 101 #define DATAFLASH_TCHS                          (0x1 << 24)
 102
 103 /* NAND flash */
 104 #ifdef CONFIG_CMD_NAND
 105 #define CONFIG_NAND_ATMEL
 106 #define CONFIG_SYS_MAX_NAND_DEVICE              1
 107 #define CONFIG_SYS_NAND_BASE                    0x40000000
 108 #define CONFIG_SYS_NAND_DBW_8
 109 /* our ALE is AD22 */
 110 #define CONFIG_SYS_NAND_MASK_ALE                (1 << 22)
 111 /* our CLE is AD21 */
 112 #define CONFIG_SYS_NAND_MASK_CLE                (1 << 21)
 113 #define CONFIG_SYS_NAND_ENABLE_PIN              AT91_PIN_PC14
 114 #define CONFIG_SYS_NAND_READY_PIN               AT91_PIN_PC15
 115
 116 #endif
 117
 118 /* NOR flash - no real flash on this board */
 119 #define CONFIG_SYS_NO_FLASH
 120
 121 /* Ethernet */
 122 #define CONFIG_DRIVER_DM9000
 123 #define CONFIG_DM9000_BASE              0x30000000
 124 #define DM9000_IO                       CONFIG_DM9000_BASE
 125 #define DM9000_DATA                     (CONFIG_DM9000_BASE + 4)
 126 #define CONFIG_DM9000_USE_16BIT
 127 #define CONFIG_DM9000_NO_SROM
 128 #define CONFIG_NET_RETRY_COUNT          20
 129 #define CONFIG_RESET_PHY_R
 130
 131 /* USB */
 132 #define CONFIG_USB_ATMEL
 133 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
 134 #define CONFIG_USB_OHCI_NEW
 135 #define CONFIG_DOS_PARTITION
 136 #define CONFIG_SYS_USB_OHCI_CPU_INIT
 137 #define CONFIG_SYS_USB_OHCI_REGS_BASE           0x00500000      /* AT91SAM9261_UHP_BASE */
 138 #ifdef CONFIG_AT91SAM9G10EK
 139 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "at91sam9g10"
 140 #else
 141 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "at91sam9261"
 142 #endif
 143 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      2
 144 #define CONFIG_USB_STORAGE
 145
 146 #define CONFIG_SYS_LOAD_ADDR                    0x22000000      /* load address */
 147
 148 #define CONFIG_SYS_MEMTEST_START                CONFIG_SYS_SDRAM_BASE
 149 #define CONFIG_SYS_MEMTEST_END                  0x23e00000
 150
 151 #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
 152
 153 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
 154 #define CONFIG_ENV_IS_IN_DATAFLASH
 155 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
 156 #define CONFIG_ENV_OFFSET       0x4200
 157 #define CONFIG_ENV_ADDR         (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
 158 #define CONFIG_ENV_SIZE         0x4200
 159 #define CONFIG_BOOTCOMMAND      "cp.b 0xC0084000 0x22000000 0x210000; bootm"
 160 #define CONFIG_BOOTARGS         "console=ttyS0,115200 "                 \
 161                                 "root=/dev/mtdblock0 "                  \
 162                                 "mtdparts=atmel_nand:-(root) "          \
 163                                 "rw rootfstype=jffs2"
 164
 165 #elif CONFIG_SYS_USE_DATAFLASH_CS3
 166
 167 /* bootstrap + u-boot + env + linux in dataflash on CS3 */
 168 #define CONFIG_ENV_IS_IN_DATAFLASH
 169 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400)
 170 #define CONFIG_ENV_OFFSET       0x4200
 171 #define CONFIG_ENV_ADDR         (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET)
 172 #define CONFIG_ENV_SIZE         0x4200
 173 #define CONFIG_BOOTCOMMAND      "cp.b 0xD0084000 0x22000000 0x210000; bootm"
 174 #define CONFIG_BOOTARGS         "console=ttyS0,115200 "                 \
 175                                 "root=/dev/mtdblock0 "                  \
 176                                 "mtdparts=atmel_nand:-(root) "          \
 177                                 "rw rootfstype=jffs2"
 178
 179 #else /* CONFIG_SYS_USE_NANDFLASH */
 180
 181 /* bootstrap + u-boot + env + linux in nandflash */
 182 #define CONFIG_ENV_IS_IN_NAND
 183 #define CONFIG_ENV_OFFSET               0xc0000
 184 #define CONFIG_ENV_OFFSET_REDUND        0x100000
 185 #define CONFIG_ENV_SIZE         0x20000         /* 1 sector = 128 kB */
 186 #define CONFIG_BOOTCOMMAND      "nand read 0x22000000 0x200000 0x300000; bootm"
 187 #define CONFIG_BOOTARGS                                                 \
 188         "console=ttyS0,115200 earlyprintk "                             \
 189         "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"          \
 190         "256k(env),256k(env_redundant),256k(spare),"                    \
 191         "512k(dtb),6M(kernel)ro,-(rootfs) "                             \
 192         "root=/dev/mtdblock7 rw rootfstype=jffs2"
 193 #endif
 194
 195 #define CONFIG_SYS_CBSIZE               256
 196 #define CONFIG_SYS_MAXARGS              16
 197 #define CONFIG_SYS_LONGHELP
 198 #define CONFIG_CMDLINE_EDITING
 199 #define CONFIG_AUTO_COMPLETE
 200
 201 /*
 202  * Size of malloc() pool
 203  */
 204 #define CONFIG_SYS_MALLOC_LEN           ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
 205
 206 #endif