include/configs/at91sam9m10g45ek.h

   1 /*
   2  * (C) Copyright 2007-2008
   3  * Stelian Pop <stelian@popies.net>
   4  * Lead Tech Design <www.leadtechdesign.com>
   5  *
   6  * Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES).
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #ifndef __CONFIG_H
  12 #define __CONFIG_H
  13
  14 #include <asm/hardware.h>
  15
  16 #define CONFIG_SYS_TEXT_BASE            0x73f00000
  17
  18 #define CONFIG_ATMEL_LEGACY             /* required until (g)pio is fixed */
  19
  20 /* ARM asynchronous clock */
  21 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768
  22 #define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
  23
  24 #define CONFIG_AT91SAM9M10G45EK
  25
  26 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs      */
  27 #define CONFIG_SETUP_MEMORY_TAGS
  28 #define CONFIG_INITRD_TAG
  29 #define CONFIG_SKIP_LOWLEVEL_INIT
  30 #define CONFIG_BOARD_EARLY_INIT_F
  31 #define CONFIG_DISPLAY_CPUINFO
  32
  33 #define CONFIG_CMD_BOOTZ
  34
  35 /* general purpose I/O */
  36 #define CONFIG_ATMEL_LEGACY             /* required until (g)pio is fixed */
  37 #define CONFIG_AT91_GPIO
  38 #define CONFIG_AT91_GPIO_PULLUP 1       /* keep pullups on peripheral pins */
  39
  40 /* serial console */
  41 #define CONFIG_ATMEL_USART
  42 #define CONFIG_USART_BASE               ATMEL_BASE_DBGU
  43 #define CONFIG_USART_ID                 ATMEL_ID_SYS
  44
  45 /* LCD */
  46 #define CONFIG_LCD
  47 #define LCD_BPP                         LCD_COLOR8
  48 #define CONFIG_LCD_LOGO
  49 #undef LCD_TEST_PATTERN
  50 #define CONFIG_LCD_INFO
  51 #define CONFIG_LCD_INFO_BELOW_LOGO
  52 #define CONFIG_SYS_WHITE_ON_BLACK
  53 #define CONFIG_ATMEL_LCD
  54 #define CONFIG_ATMEL_LCD_RGB565
  55 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
  56 /* board specific(not enough SRAM) */
  57 #define CONFIG_AT91SAM9G45_LCD_BASE             0x73E00000
  58
  59 /* LED */
  60 #define CONFIG_AT91_LED
  61 #define CONFIG_RED_LED          AT91_PIN_PD31   /* this is the user1 led */
  62 #define CONFIG_GREEN_LED        AT91_PIN_PD0    /* this is the user2 led */
  63
  64 #define CONFIG_BOOTDELAY        3
  65
  66 /*
  67  * BOOTP options
  68  */
  69 #define CONFIG_BOOTP_BOOTFILESIZE
  70 #define CONFIG_BOOTP_BOOTPATH
  71 #define CONFIG_BOOTP_GATEWAY
  72 #define CONFIG_BOOTP_HOSTNAME
  73
  74 /*
  75  * Command line configuration.
  76  */
  77
  78 /* No NOR flash */
  79 #define CONFIG_SYS_NO_FLASH
  80 #define CONFIG_CMD_PING
  81 #define CONFIG_CMD_DHCP
  82 #define CONFIG_CMD_NAND
  83 #define CONFIG_CMD_USB
  84
  85 /* SDRAM */
  86 #define CONFIG_NR_DRAM_BANKS            1
  87 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_CS6
  88 #define CONFIG_SYS_SDRAM_SIZE           0x08000000
  89
  90 #define CONFIG_SYS_INIT_SP_ADDR \
  91         (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
  92
  93 /* NAND flash */
  94 #ifdef CONFIG_CMD_NAND
  95 #define CONFIG_NAND_ATMEL
  96 #define CONFIG_SYS_MAX_NAND_DEVICE              1
  97 #define CONFIG_SYS_NAND_BASE                    ATMEL_BASE_CS3
  98 #define CONFIG_SYS_NAND_DBW_8
  99 /* our ALE is AD21 */
 100 #define CONFIG_SYS_NAND_MASK_ALE                (1 << 21)
 101 /* our CLE is AD22 */
 102 #define CONFIG_SYS_NAND_MASK_CLE                (1 << 22)
 103 #define CONFIG_SYS_NAND_ENABLE_PIN              AT91_PIN_PC14
 104 #define CONFIG_SYS_NAND_READY_PIN               AT91_PIN_PC8
 105
 106 #endif
 107
 108 /* MMC */
 109 #define CONFIG_CMD_MMC
 110
 111 #ifdef CONFIG_CMD_MMC
 112 #define CONFIG_MMC
 113 #define CONFIG_GENERIC_MMC
 114 #define CONFIG_GENERIC_ATMEL_MCI
 115 #endif
 116
 117 #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
 118 #define CONFIG_CMD_FAT
 119 #define CONFIG_DOS_PARTITION
 120 #endif
 121
 122 /* Ethernet */
 123 #define CONFIG_MACB
 124 #define CONFIG_RMII
 125 #define CONFIG_NET_RETRY_COUNT          20
 126 #define CONFIG_RESET_PHY_R
 127 #define CONFIG_AT91_WANTS_COMMON_PHY
 128
 129 /* USB */
 130 #define CONFIG_USB_EHCI
 131 #define CONFIG_USB_EHCI_ATMEL
 132 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS      2
 133 #define CONFIG_USB_STORAGE
 134
 135 #define CONFIG_SYS_LOAD_ADDR            0x22000000      /* load address */
 136
 137 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
 138 #define CONFIG_SYS_MEMTEST_END          0x23e00000
 139
 140 #ifdef CONFIG_SYS_USE_NANDFLASH
 141 /* bootstrap + u-boot + env in nandflash */
 142 #define CONFIG_ENV_IS_IN_NAND
 143 #define CONFIG_ENV_OFFSET               0xc0000
 144 #define CONFIG_ENV_OFFSET_REDUND        0x100000
 145 #define CONFIG_ENV_SIZE                 0x20000
 146
 147 #define CONFIG_BOOTCOMMAND                                              \
 148         "nand read 0x70000000 0x200000 0x300000;"                       \
 149         "bootm 0x70000000"
 150 #define CONFIG_BOOTARGS                                                 \
 151         "console=ttyS0,115200 earlyprintk "                             \
 152         "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"          \
 153         "256k(env),256k(env_redundant),256k(spare),"                    \
 154         "512k(dtb),6M(kernel)ro,-(rootfs) "                             \
 155         "root=/dev/mtdblock7 rw rootfstype=jffs2"
 156 #elif CONFIG_SYS_USE_MMC
 157 /* bootstrap + u-boot + env + linux in mmc */
 158 #define FAT_ENV_INTERFACE       "mmc"
 159 /*
 160  * We don't specify the part number, if device 0 has partition table, it means
 161  * the first partition; it no partition table, then take whole device as a
 162  * FAT file system.
 163  */
 164 #define FAT_ENV_DEVICE_AND_PART "0"
 165 #define FAT_ENV_FILE            "uboot.env"
 166 #define CONFIG_ENV_IS_IN_FAT
 167 #define CONFIG_FAT_WRITE
 168 #define CONFIG_ENV_SIZE         0x4000
 169
 170 #define CONFIG_BOOTARGS         "console=ttyS0,115200 " \
 171                                 "mtdparts=atmel_nand:" \
 172                                 "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
 173                                 "root=/dev/mmcblk0p2 rw rootwait"
 174 #define CONFIG_BOOTCOMMAND      "fatload mmc 0:1 0x71000000 dtb; " \
 175                                 "fatload mmc 0:1 0x72000000 zImage; " \
 176                                 "bootz 0x72000000 - 0x71000000"
 177 #endif
 178
 179 #define CONFIG_BAUDRATE                 115200
 180
 181 #define CONFIG_SYS_CBSIZE               256
 182 #define CONFIG_SYS_MAXARGS              16
 183 #define CONFIG_SYS_LONGHELP
 184 #define CONFIG_CMDLINE_EDITING
 185 #define CONFIG_AUTO_COMPLETE
 186 #define CONFIG_SYS_HUSH_PARSER
 187
 188 /*
 189  * Size of malloc() pool
 190  */
 191 #define CONFIG_SYS_MALLOC_LEN           ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
 192
 193 /* Defines for SPL */
 194 #define CONFIG_SPL_FRAMEWORK
 195 #define CONFIG_SPL_TEXT_BASE            0x300000
 196 #define CONFIG_SPL_MAX_SIZE             0x010000
 197 #define CONFIG_SPL_STACK                0x310000
 198
 199 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 200 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 201 #define CONFIG_SPL_SERIAL_SUPPORT
 202 #define CONFIG_SPL_GPIO_SUPPORT
 203
 204 #define CONFIG_SYS_MONITOR_LEN          0x80000
 205
 206 #ifdef CONFIG_SYS_USE_MMC
 207
 208 #define CONFIG_SPL_BSS_START_ADDR       0x70000000
 209 #define CONFIG_SPL_BSS_MAX_SIZE         0x00080000
 210 #define CONFIG_SYS_SPL_MALLOC_START     0x70080000
 211 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x00080000
 212
 213 #define CONFIG_SPL_LDSCRIPT             arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
 214 #define CONFIG_SPL_MMC_SUPPORT
 215 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x400
 216 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
 217 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
 218 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME         "u-boot.img"
 219 #define CONFIG_SPL_FAT_SUPPORT
 220 #define CONFIG_SPL_LIBDISK_SUPPORT
 221
 222 #elif CONFIG_SYS_USE_NANDFLASH
 223 #define CONFIG_SPL_NAND_SUPPORT
 224 #define CONFIG_SPL_NAND_DRIVERS
 225 #define CONFIG_SPL_NAND_BASE
 226 #define CONFIG_SPL_NAND_ECC
 227 #define CONFIG_SPL_NAND_SOFTECC
 228 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x40000
 229 #define CONFIG_SYS_NAND_U_BOOT_SIZE     0x80000
 230 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 231
 232 #define CONFIG_SYS_NAND_PAGE_SIZE       0x800
 233 #define CONFIG_SYS_NAND_BLOCK_SIZE      0x20000
 234 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 235 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
 236 #define CONFIG_SYS_NAND_ECCSIZE         256
 237 #define CONFIG_SYS_NAND_ECCBYTES        3
 238 #define CONFIG_SYS_NAND_OOBSIZE         64
 239 #define CONFIG_SYS_NAND_ECCPOS          { 40, 41, 42, 43, 44, 45, 46, 47, \
 240                                           48, 49, 50, 51, 52, 53, 54, 55, \
 241                                           56, 57, 58, 59, 60, 61, 62, 63, }
 242 #endif
 243
 244 #define CONFIG_SPL_ATMEL_SIZE
 245 #define CONFIG_SYS_MASTER_CLOCK         132096000
 246 #define CONFIG_SYS_AT91_PLLA            0x20c73f03
 247 #define CONFIG_SYS_MCKR                 0x1301
 248 #define CONFIG_SYS_MCKR_CSS             0x1302
 249
 250 #endif