include/configs/at91sam9n12ek.h

   1 /*
   2  * (C) Copyright 2013 Atmel Corporation.
   3  * Josh Wu <josh.wu@atmel.com>
   4  *
   5  * Configuation settings for the AT91SAM9N12-EK boards.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #ifndef __AT91SAM9N12_CONFIG_H_
  11 #define __AT91SAM9N12_CONFIG_H_
  12
  13 /*
  14  * SoC must be defined first, before hardware.h is included.
  15  * In this case SoC is defined in boards.cfg.
  16  */
  17 #include <asm/hardware.h>
  18
  19 #define CONFIG_SYS_TEXT_BASE            0x26f00000
  20
  21 /* ARM asynchronous clock */
  22 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768           /* slow clock xtal */
  23 #define CONFIG_SYS_AT91_MAIN_CLOCK      16000000        /* main clock xtal */
  24
  25 /* Misc CPU related */
  26 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
  27 #define CONFIG_SETUP_MEMORY_TAGS
  28 #define CONFIG_INITRD_TAG
  29 #define CONFIG_SKIP_LOWLEVEL_INIT
  30 #define CONFIG_BOARD_EARLY_INIT_F
  31 #define CONFIG_DISPLAY_CPUINFO
  32
  33 /* general purpose I/O */
  34 #define CONFIG_AT91_GPIO
  35
  36 /* serial console */
  37 #define CONFIG_ATMEL_USART
  38 #define CONFIG_USART_BASE               ATMEL_BASE_DBGU
  39 #define CONFIG_USART_ID                 ATMEL_ID_SYS
  40 #define CONFIG_BAUDRATE                 115200
  41
  42 /* LCD */
  43 #define CONFIG_LCD
  44 #define LCD_BPP                         LCD_COLOR16
  45 #define LCD_OUTPUT_BPP                  24
  46 #define CONFIG_LCD_LOGO
  47 #define CONFIG_LCD_INFO
  48 #define CONFIG_LCD_INFO_BELOW_LOGO
  49 #define CONFIG_SYS_WHITE_ON_BLACK
  50 #define CONFIG_ATMEL_HLCD
  51 #define CONFIG_ATMEL_LCD_RGB565
  52 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
  53
  54
  55 /*
  56  * BOOTP options
  57  */
  58 #define CONFIG_BOOTP_BOOTFILESIZE
  59 #define CONFIG_BOOTP_BOOTPATH
  60 #define CONFIG_BOOTP_GATEWAY
  61 #define CONFIG_BOOTP_HOSTNAME
  62
  63 /* NOR flash - no real flash on this board */
  64 #define CONFIG_SYS_NO_FLASH
  65
  66 /*
  67  * Command line configuration.
  68  */
  69 #define CONFIG_CMD_NAND
  70
  71 #define CONFIG_NR_DRAM_BANKS            1
  72 #define CONFIG_SYS_SDRAM_BASE           0x20000000
  73 #define CONFIG_SYS_SDRAM_SIZE           0x08000000
  74
  75 /*
  76  * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
  77  * leaving the correct space for initial global data structure above
  78  * that address while providing maximum stack area below.
  79  */
  80 # define CONFIG_SYS_INIT_SP_ADDR \
  81         (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
  82
  83 /* DataFlash */
  84 #ifdef CONFIG_CMD_SF
  85 #define CONFIG_ATMEL_SPI
  86 #define CONFIG_SF_DEFAULT_SPEED         30000000
  87 #define CONFIG_ENV_SPI_MODE             SPI_MODE_3
  88 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_3
  89 #endif
  90
  91 /* NAND flash */
  92 #ifdef CONFIG_CMD_NAND
  93 #define CONFIG_NAND_ATMEL
  94 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  95 #define CONFIG_SYS_NAND_BASE            0x40000000
  96 #define CONFIG_SYS_NAND_MASK_ALE        (1 << 21)
  97 #define CONFIG_SYS_NAND_MASK_CLE        (1 << 22)
  98 #define CONFIG_SYS_NAND_ENABLE_PIN      GPIO_PIN_PD(4)
  99 #define CONFIG_SYS_NAND_READY_PIN       GPIO_PIN_PD(5)
 100
 101 /* PMECC & PMERRLOC */
 102 #define CONFIG_ATMEL_NAND_HWECC
 103 #define CONFIG_ATMEL_NAND_HW_PMECC
 104 #define CONFIG_PMECC_CAP                2
 105 #define CONFIG_PMECC_SECTOR_SIZE        512
 106 #define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
 107
 108 #define CONFIG_CMD_NAND_TRIMFFS
 109
 110 #endif
 111
 112 #define CONFIG_MTD_PARTITIONS
 113 #define CONFIG_MTD_DEVICE
 114 #define CONFIG_CMD_MTDPARTS
 115 #define MTDIDS_DEFAULT                  "nand0=atmel_nand"
 116 #define MTDPARTS_DEFAULT                                                \
 117         "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"          \
 118         "256k(env),256k(env_redundant),256k(spare),"                    \
 119         "512k(dtb),6M(kernel)ro,-(rootfs)"
 120
 121 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 122         "console=console=ttyS0,115200\0"                                \
 123         "mtdparts="MTDPARTS_DEFAULT"\0"                                 \
 124         "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
 125         "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
 126
 127 /* MMC */
 128 #ifdef CONFIG_CMD_MMC
 129 #define CONFIG_MMC
 130 #define CONFIG_GENERIC_MMC
 131 #define CONFIG_GENERIC_ATMEL_MCI
 132 #endif
 133
 134 /* FAT */
 135 #ifdef CONFIG_CMD_FAT
 136 #define CONFIG_DOS_PARTITION
 137 #endif
 138
 139 /* Ethernet */
 140 #define CONFIG_KS8851_MLL
 141 #define CONFIG_KS8851_MLL_BASEADDR      0x30000000 /* use NCS2 */
 142
 143 #define CONFIG_SYS_LOAD_ADDR            0x22000000 /* load address */
 144
 145 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
 146 #define CONFIG_SYS_MEMTEST_END          0x26e00000
 147
 148 /* USB host */
 149 #ifdef CONFIG_CMD_USB
 150 #define CONFIG_USB_ATMEL
 151 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
 152 #define CONFIG_USB_OHCI_NEW
 153 #define CONFIG_SYS_USB_OHCI_CPU_INIT
 154 #define CONFIG_SYS_USB_OHCI_REGS_BASE   ATMEL_BASE_OHCI
 155 #define CONFIG_SYS_USB_OHCI_SLOT_NAME   "at91sam9n12"
 156 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      1
 157 #define CONFIG_USB_STORAGE
 158 #endif
 159
 160 #ifdef CONFIG_SYS_USE_SPIFLASH
 161
 162 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
 163 #define CONFIG_ENV_IS_IN_SPI_FLASH
 164 #define CONFIG_ENV_OFFSET               0x5000
 165 #define CONFIG_ENV_SIZE                 0x3000
 166 #define CONFIG_ENV_SECT_SIZE            0x1000
 167 #define CONFIG_BOOTCOMMAND                                              \
 168         "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};"      \
 169         "sf probe 0; sf read 0x22000000 0x100000 0x300000; "            \
 170         "bootm 0x22000000"
 171
 172 #elif defined(CONFIG_SYS_USE_NANDFLASH)
 173
 174 /* bootstrap + u-boot + env + linux in nandflash */
 175 #define CONFIG_ENV_IS_IN_NAND
 176 #define CONFIG_ENV_OFFSET               0xc0000
 177 #define CONFIG_ENV_OFFSET_REDUND        0x100000
 178 #define CONFIG_ENV_SIZE                 0x20000         /* 1 sector = 128 kB */
 179 #define CONFIG_BOOTCOMMAND                                              \
 180         "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};"      \
 181         "nand read 0x21000000 0x180000 0x080000;"                       \
 182         "nand read 0x22000000 0x200000 0x400000;"                       \
 183         "bootm 0x22000000 - 0x21000000"
 184
 185 #else /* CONFIG_SYS_USE_MMC */
 186
 187 /* bootstrap + u-boot + env + linux in mmc */
 188
 189 #ifdef CONFIG_ENV_IS_IN_MMC
 190 /* Use raw reserved sectors to save environment */
 191 #define CONFIG_ENV_OFFSET               0x2000
 192 #define CONFIG_ENV_SIZE                 0x1000
 193 #define CONFIG_SYS_MMC_ENV_DEV          0
 194 #else
 195 /* Use file in FAT file to save environment */
 196 #define CONFIG_ENV_IS_IN_FAT
 197 #define CONFIG_FAT_WRITE
 198 #define FAT_ENV_INTERFACE               "mmc"
 199 #define FAT_ENV_FILE                    "uboot.env"
 200 #define FAT_ENV_DEVICE_AND_PART         "0"
 201 #define CONFIG_ENV_SIZE                 0x4000
 202 #endif
 203
 204 #define CONFIG_BOOTCOMMAND                                              \
 205         "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};"       \
 206         "fatload mmc 0:1 0x21000000 dtb;"                               \
 207         "fatload mmc 0:1 0x22000000 uImage;"                            \
 208         "bootm 0x22000000 - 0x21000000"
 209
 210 #endif
 211
 212 #define CONFIG_SYS_CBSIZE       256
 213 #define CONFIG_SYS_MAXARGS      16
 214 #define CONFIG_SYS_LONGHELP
 215 #define CONFIG_CMDLINE_EDITING
 216 #define CONFIG_AUTO_COMPLETE
 217
 218 /*
 219  * Size of malloc() pool
 220  */
 221 #define CONFIG_SYS_MALLOC_LEN   (4 * 1024 * 1024)
 222
 223 /* SPL */
 224 #define CONFIG_SPL_FRAMEWORK
 225 #define CONFIG_SPL_TEXT_BASE            0x300000
 226 #define CONFIG_SPL_MAX_SIZE             0x6000
 227 #define CONFIG_SPL_STACK                0x308000
 228
 229 #define CONFIG_SPL_BSS_START_ADDR       0x20000000
 230 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
 231 #define CONFIG_SYS_SPL_MALLOC_START     0x20080000
 232 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
 233
 234 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 235 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 236 #define CONFIG_SPL_GPIO_SUPPORT
 237 #define CONFIG_SPL_SERIAL_SUPPORT
 238
 239 #define CONFIG_SPL_BOARD_INIT
 240 #define CONFIG_SYS_MONITOR_LEN          (512 << 10)
 241
 242 #define CONFIG_SYS_MASTER_CLOCK         132096000
 243 #define CONFIG_SYS_AT91_PLLA            0x20953f03
 244 #define CONFIG_SYS_MCKR                 0x1301
 245 #define CONFIG_SYS_MCKR_CSS             0x1302
 246
 247 #ifdef CONFIG_SYS_USE_MMC
 248 #define CONFIG_SPL_LDSCRIPT             arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
 249 #define CONFIG_SPL_MMC_SUPPORT
 250 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x400
 251 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
 252 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
 253 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME         "u-boot.img"
 254 #define CONFIG_SPL_FAT_SUPPORT
 255 #define CONFIG_SPL_LIBDISK_SUPPORT
 256
 257 #elif CONFIG_SYS_USE_NANDFLASH
 258 #define CONFIG_SPL_NAND_SUPPORT
 259 #define CONFIG_SPL_NAND_DRIVERS
 260 #define CONFIG_SPL_NAND_BASE
 261 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x40000
 262 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 263 #define CONFIG_SYS_NAND_PAGE_SIZE       0x800
 264 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 265 #define CONFIG_SYS_NAND_OOBSIZE         64
 266 #define CONFIG_SYS_NAND_BLOCK_SIZE      0x20000
 267 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0x0
 268 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 269
 270 #elif CONFIG_SYS_USE_SPIFLASH
 271 #define CONFIG_SPL_SPI_SUPPORT
 272 #define CONFIG_SPL_SPI_FLASH_SUPPORT
 273 #define CONFIG_SPL_SPI_LOAD
 274 #define CONFIG_SYS_SPI_U_BOOT_OFFS      0x8400
 275
 276 #endif
 277
 278 #endif