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1 /*
2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * Configuation settings for the AT91SAM9RLEK board.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27 #ifndef __CONFIG_H
28 #define __CONFIG_H
29
30 /* ARM asynchronous clock */
31 #define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
32 #define CONFIG_SYS_HZ 1000
33
34 #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
35 #define CONFIG_AT91SAM9RL 1 /* It's an Atmel AT91SAM9RL SoC*/
36 #define CONFIG_AT91SAM9RLEK 1 /* on an AT91SAM9RLEK Board */
37 #define CONFIG_ARCH_CPU_INIT
38 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
39
40 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
41 #define CONFIG_SETUP_MEMORY_TAGS 1
42 #define CONFIG_INITRD_TAG 1
43
44 #define CONFIG_SKIP_LOWLEVEL_INIT
45 #define CONFIG_SKIP_RELOCATE_UBOOT
46
47 /*
48 * Hardware drivers
49 */
50 #define CONFIG_ATMEL_USART 1
51 #undef CONFIG_USART0
52 #undef CONFIG_USART1
53 #undef CONFIG_USART2
54 #define CONFIG_USART3 1 /* USART 3 is DBGU */
55
56 /* LCD */
57 #define CONFIG_LCD 1
58 #define LCD_BPP LCD_COLOR8
59 #define CONFIG_LCD_LOGO 1
60 #undef LCD_TEST_PATTERN
61 #define CONFIG_LCD_INFO 1
62 #define CONFIG_LCD_INFO_BELOW_LOGO 1
63 #define CONFIG_SYS_WHITE_ON_BLACK 1
64 #define CONFIG_ATMEL_LCD 1
65 #define CONFIG_ATMEL_LCD_RGB565 1
66 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
67
68 /* LED */
69 #define CONFIG_AT91_LED
70 #define CONFIG_RED_LED AT91_PIN_PD14 /* this is the power led */
71 #define CONFIG_GREEN_LED AT91_PIN_PD15 /* this is the user1 led */
72 #define CONFIG_YELLOW_LED AT91_PIN_PD16 /* this is the user2 led */
73
74 #define CONFIG_BOOTDELAY 3
75
76 /*
77 * Command line configuration.
78 */
79 #include <config_cmd_default.h>
80 #undef CONFIG_CMD_BDI
81 #undef CONFIG_CMD_FPGA
82 #undef CONFIG_CMD_IMI
83 #undef CONFIG_CMD_IMLS
84 #undef CONFIG_CMD_LOADS
85 #undef CONFIG_CMD_NET
86 #undef CONFIG_CMD_SOURCE
87 #undef CONFIG_CMD_USB
88
89 #define CONFIG_CMD_NAND 1
90
91 /* SDRAM */
92 #define CONFIG_NR_DRAM_BANKS 1
93 #define PHYS_SDRAM 0x20000000
94 #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
95
96 /* DataFlash */
97 #define CONFIG_ATMEL_DATAFLASH_SPI
98 #define CONFIG_HAS_DATAFLASH 1
99 #define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
100 #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
101 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
102 #define AT91_SPI_CLK 15000000
103 #define DATAFLASH_TCSS (0x1a << 16)
104 #define DATAFLASH_TCHS (0x1 << 24)
105
106 /* NOR flash - not present */
107 #define CONFIG_SYS_NO_FLASH 1
108
109 /* NAND flash */
110 #ifdef CONFIG_CMD_NAND
111 #define CONFIG_NAND_ATMEL
112 #define CONFIG_SYS_MAX_NAND_DEVICE 1
113 #define CONFIG_SYS_NAND_BASE 0x40000000
114 #define CONFIG_SYS_NAND_DBW_8 1
115 /* our ALE is AD21 */
116 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
117 /* our CLE is AD22 */
118 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
119 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6
120 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17
121
122 #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
123 #endif
124
125 /* Ethernet - not present */
126
127 /* USB - not supported */
128
129 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
130
131 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
132 #define CONFIG_SYS_MEMTEST_END 0x23e00000
133
134 #ifdef CONFIG_SYS_USE_DATAFLASH
135
136 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
137 #define CONFIG_ENV_IS_IN_DATAFLASH 1
138 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
139 #define CONFIG_ENV_OFFSET 0x4200
140 #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
141 #define CONFIG_ENV_SIZE 0x4200
142 #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
143 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
144 "root=/dev/mtdblock0 " \
145 "mtdparts=at91_nand:-(root) "\
146 "rw rootfstype=jffs2"
147
148 #else /* CONFIG_SYS_USE_NANDFLASH */
149
150 /* bootstrap + u-boot + env + linux in nandflash */
151 #define CONFIG_ENV_IS_IN_NAND 1
152 #define CONFIG_ENV_OFFSET 0x60000
153 #define CONFIG_ENV_OFFSET_REDUND 0x80000
154 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
155 #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
156 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
157 "root=/dev/mtdblock5 " \
158 "mtdparts=at91_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \
159 "rw rootfstype=jffs2"
160
161 #endif
162
163 #define CONFIG_BAUDRATE 115200
164 #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
165
166 #define CONFIG_SYS_PROMPT "U-Boot> "
167 #define CONFIG_SYS_CBSIZE 256
168 #define CONFIG_SYS_MAXARGS 16
169 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
170 #define CONFIG_SYS_LONGHELP 1
171 #define CONFIG_CMDLINE_EDITING 1
172
173 /*
174 * Size of malloc() pool
175 */
176 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
177 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
178
179 #define CONFIG_STACKSIZE (32*1024) /* regular stack */
180
181 #ifdef CONFIG_USE_IRQ
182 #error CONFIG_USE_IRQ not supported
183 #endif
184
185 #endif