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1 /*
2 * Copyright (C) 2012 Atmel Corporation
3 *
4 * Configuation settings for the AT91SAM9X5EK board.
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25 #ifndef __CONFIG_H__
26 #define __CONFIG_H__
27
28 #include <asm/hardware.h>
29
30 /* ARM asynchronous clock */
31 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
32 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
33 #define CONFIG_SYS_HZ 1000
34
35 #define CONFIG_AT91SAM9X5EK
36 #define CONFIG_AT91FAMILY
37
38 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
39 #define CONFIG_SETUP_MEMORY_TAGS
40 #define CONFIG_INITRD_TAG
41 #define CONFIG_SKIP_LOWLEVEL_INIT
42 #define CONFIG_BOARD_EARLY_INIT_F
43 #define CONFIG_DISPLAY_CPUINFO
44
45 /* general purpose I/O */
46 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
47 #define CONFIG_AT91_GPIO
48
49 /* serial console */
50 #define CONFIG_ATMEL_USART
51 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
52 #define CONFIG_USART_ID ATMEL_ID_SYS
53
54 /* LCD */
55 #define CONFIG_LCD
56 #define LCD_BPP LCD_COLOR16
57 #define LCD_OUTPUT_BPP 24
58 #define CONFIG_LCD_LOGO
59 #undef LCD_TEST_PATTERN
60 #define CONFIG_LCD_INFO
61 #define CONFIG_LCD_INFO_BELOW_LOGO
62 #define CONFIG_SYS_WHITE_ON_BLACK
63 #define CONFIG_ATMEL_HLCD
64 #define CONFIG_ATMEL_LCD_RGB565
65 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
66
67 #define CONFIG_BOOTDELAY 3
68
69 /*
70 * BOOTP options
71 */
72 #define CONFIG_BOOTP_BOOTFILESIZE
73 #define CONFIG_BOOTP_BOOTPATH
74 #define CONFIG_BOOTP_GATEWAY
75 #define CONFIG_BOOTP_HOSTNAME
76
77 /*
78 * Command line configuration.
79 */
80 #include <config_cmd_default.h>
81 #undef CONFIG_CMD_FPGA
82 #undef CONFIG_CMD_IMI
83 #undef CONFIG_CMD_IMLS
84 #undef CONFIG_CMD_LOADS
85
86 #define CONFIG_CMD_PING
87 #define CONFIG_CMD_DHCP
88 #define CONFIG_CMD_NAND
89 #define CONFIG_CMD_SF
90
91 /* SDRAM */
92 #define CONFIG_NR_DRAM_BANKS 1
93 #define CONFIG_SYS_SDRAM_BASE 0x20000000
94 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */
95
96 #define CONFIG_SYS_INIT_SP_ADDR \
97 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
98
99 /* DataFlash */
100 #ifdef CONFIG_CMD_SF
101 #define CONFIG_ATMEL_SPI
102 #define CONFIG_SPI_FLASH
103 #define CONFIG_SPI_FLASH_ATMEL
104 #define CONFIG_SF_DEFAULT_SPEED 30000000
105 #endif
106
107 /* no NOR flash */
108 #define CONFIG_SYS_NO_FLASH
109
110 /* NAND flash */
111 #ifdef CONFIG_CMD_NAND
112 #define CONFIG_NAND_ATMEL
113 #define CONFIG_SYS_MAX_NAND_DEVICE 1
114 #define CONFIG_SYS_NAND_BASE 0x40000000
115 #define CONFIG_SYS_NAND_DBW_8 1
116 /* our ALE is AD21 */
117 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
118 /* our CLE is AD22 */
119 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
120 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
121 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
122
123 /* PMECC & PMERRLOC */
124 #define CONFIG_ATMEL_NAND_HWECC 1
125 #define CONFIG_ATMEL_NAND_HW_PMECC 1
126 #define CONFIG_PMECC_CAP 2
127 #define CONFIG_PMECC_SECTOR_SIZE 512
128 #define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
129
130 #define CONFIG_MTD_DEVICE
131 #define CONFIG_CMD_MTDPARTS
132 #define CONFIG_MTD_PARTITIONS
133 #define CONFIG_RBTREE
134 #define CONFIG_LZO
135 #define CONFIG_CMD_UBI
136 #define CONFIG_CMD_UBIFS
137 #endif
138
139 /* Ethernet */
140 #define CONFIG_MACB
141 #define CONFIG_RMII
142 #define CONFIG_NET_RETRY_COUNT 20
143 #define CONFIG_MACB_SEARCH_PHY
144
145 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
146
147 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
148 #define CONFIG_SYS_MEMTEST_END 0x26e00000
149
150 #ifdef CONFIG_SYS_USE_NANDFLASH
151 /* bootstrap + u-boot + env + linux in nandflash */
152 #define CONFIG_ENV_IS_IN_NAND
153 #define CONFIG_ENV_OFFSET 0xc0000
154 #define CONFIG_ENV_OFFSET_REDUND 0x100000
155 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
156 #define CONFIG_BOOTCOMMAND "nand read " \
157 "0x22000000 0x200000 0x300000; " \
158 "bootm 0x22000000"
159 #else
160 #ifdef CONFIG_SYS_USE_SPIFLASH
161 /* bootstrap + u-boot + env + linux in spi flash */
162 #define CONFIG_ENV_IS_IN_SPI_FLASH
163 #define CONFIG_ENV_OFFSET 0x5000
164 #define CONFIG_ENV_SIZE 0x3000
165 #define CONFIG_ENV_SECT_SIZE 0x1000
166 #define CONFIG_ENV_SPI_MAX_HZ 30000000
167 #define CONFIG_BOOTCOMMAND "sf probe 0; " \
168 "sf read 0x22000000 0x100000 0x300000; " \
169 "bootm 0x22000000"
170 #endif
171 #endif
172
173 #define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 " \
174 "mtdparts=atmel_nand:" \
175 "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
176 "root=/dev/mtdblock1 rw " \
177 "rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs"
178
179 #define CONFIG_BAUDRATE 115200
180
181 #define CONFIG_SYS_PROMPT "U-Boot> "
182 #define CONFIG_SYS_CBSIZE 256
183 #define CONFIG_SYS_MAXARGS 16
184 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) \
185 + 16)
186 #define CONFIG_SYS_LONGHELP
187 #define CONFIG_CMDLINE_EDITING
188 #define CONFIG_AUTO_COMPLETE
189 #define CONFIG_SYS_HUSH_PARSER
190
191 /*
192 * Size of malloc() pool
193 */
194 #define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000)
195
196 #ifdef CONFIG_USE_IRQ
197 #error CONFIG_USE_IRQ not supported
198 #endif
199
200 #endif