include/configs/atngw100.h

   1 /*
   2  * Copyright (C) 2006 Atmel Corporation
   3  *
   4  * Configuration settings for the AVR32 Network Gateway
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8 #ifndef __CONFIG_H
   9 #define __CONFIG_H
  10
  11 #include <asm/arch/hardware.h>
  12
  13 #define CONFIG_AT32AP
  14 #define CONFIG_AT32AP7000
  15 #define CONFIG_ATNGW100
  16
  17 #define CONFIG_BOARD_EARLY_INIT_R
  18
  19 /*
  20  * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
  21  * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
  22  * and the PBA bus to run at 1/4 the PLL frequency.
  23  */
  24 #define CONFIG_PLL
  25 #define CONFIG_SYS_POWER_MANAGER
  26 #define CONFIG_SYS_OSC0_HZ                      20000000
  27 #define CONFIG_SYS_PLL0_DIV                     1
  28 #define CONFIG_SYS_PLL0_MUL                     7
  29 #define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16
  30 #define CONFIG_SYS_CLKDIV_CPU                   0
  31 #define CONFIG_SYS_CLKDIV_HSB                   1
  32 #define CONFIG_SYS_CLKDIV_PBA                   2
  33 #define CONFIG_SYS_CLKDIV_PBB                   1
  34
  35 /* Reserve VM regions for SDRAM and NOR flash */
  36 #define CONFIG_SYS_NR_VM_REGIONS                2
  37
  38 /*
  39  * The PLLOPT register controls the PLL like this:
  40  *   icp = PLLOPT<2>
  41  *   ivco = PLLOPT<1:0>
  42  *
  43  * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
  44  */
  45 #define CONFIG_SYS_PLL0_OPT                     0x04
  46
  47 #define CONFIG_USART_BASE               ATMEL_BASE_USART1
  48 #define CONFIG_USART_ID                 1
  49 /* User serviceable stuff */
  50
  51 #define CONFIG_CMDLINE_TAG
  52 #define CONFIG_SETUP_MEMORY_TAGS
  53 #define CONFIG_INITRD_TAG
  54
  55 #define CONFIG_STACKSIZE                (2048)
  56
  57 #define CONFIG_BAUDRATE                 115200
  58 #define CONFIG_BOOTARGS                                                 \
  59         "console=ttyS0 root=/dev/mtdblock1 rootfstype=jffs2"
  60 #define CONFIG_BOOTCOMMAND                                              \
  61         "fsload; bootm"
  62
  63
  64 /*
  65  * After booting the board for the first time, new ethernet addresses
  66  * should be generated and assigned to the environment variables
  67  * "ethaddr" and "eth1addr". This is normally done during production.
  68  */
  69 #define CONFIG_OVERWRITE_ETHADDR_ONCE
  70
  71 /*
  72  * BOOTP/DHCP options
  73  */
  74 #define CONFIG_BOOTP_SUBNETMASK
  75 #define CONFIG_BOOTP_GATEWAY
  76
  77 /*
  78  * Command line configuration.
  79  */
  80 #define CONFIG_CMD_JFFS2
  81
  82 #define CONFIG_ATMEL_USART
  83 #define CONFIG_MACB
  84 #define CONFIG_PORTMUX_PIO
  85 #define CONFIG_SYS_NR_PIOS                      5
  86 #define CONFIG_SYS_HSDRAMC
  87 #define CONFIG_GENERIC_ATMEL_MCI
  88 #define CONFIG_GENERIC_MMC
  89 #define CONFIG_ATMEL_SPI
  90
  91 #define CONFIG_SYS_DCACHE_LINESZ                32
  92 #define CONFIG_SYS_ICACHE_LINESZ                32
  93
  94 #define CONFIG_NR_DRAM_BANKS            1
  95
  96 #define CONFIG_SYS_FLASH_CFI
  97 #define CONFIG_FLASH_CFI_DRIVER
  98
  99 #define CONFIG_SYS_FLASH_BASE                   0x00000000
 100 #define CONFIG_SYS_FLASH_SIZE                   0x800000
 101 #define CONFIG_SYS_MAX_FLASH_BANKS              1
 102 #define CONFIG_SYS_MAX_FLASH_SECT               135
 103
 104 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 105 #define CONFIG_SYS_TEXT_BASE            0x00000000
 106
 107 #define CONFIG_SYS_INTRAM_BASE                  INTERNAL_SRAM_BASE
 108 #define CONFIG_SYS_INTRAM_SIZE                  INTERNAL_SRAM_SIZE
 109 #define CONFIG_SYS_SDRAM_BASE                   EBI_SDRAM_BASE
 110
 111 #define CONFIG_ENV_IS_IN_FLASH
 112 #define CONFIG_ENV_SIZE                 65536
 113 #define CONFIG_ENV_ADDR                 (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
 114
 115 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
 116
 117 #define CONFIG_SYS_MALLOC_LEN                   (256*1024)
 118
 119 /* Allow 4MB for the kernel run-time image */
 120 #define CONFIG_SYS_LOAD_ADDR                    (EBI_SDRAM_BASE + 0x00400000)
 121 #define CONFIG_SYS_BOOTPARAMS_LEN               (16 * 1024)
 122
 123 /* Other configuration settings that shouldn't have to change all that often */
 124 #define CONFIG_SYS_CBSIZE                       256
 125 #define CONFIG_SYS_MAXARGS                      16
 126 #define CONFIG_SYS_PBSIZE                       (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 127 #define CONFIG_SYS_LONGHELP
 128
 129 #define CONFIG_SYS_MEMTEST_START                EBI_SDRAM_BASE
 130 #define CONFIG_SYS_MEMTEST_END                  (CONFIG_SYS_MEMTEST_START + 0x1f00000)
 131
 132 #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
 133
 134 #endif /* __CONFIG_H */