include/configs/atngw100.h

   1 /*
   2  * Copyright (C) 2006 Atmel Corporation
   3  *
   4  * Configuration settings for the AVR32 Network Gateway
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8 #ifndef __CONFIG_H
   9 #define __CONFIG_H
  10
  11 #include <asm/arch/hardware.h>
  12
  13 #define CONFIG_AVR32
  14 #define CONFIG_AT32AP
  15 #define CONFIG_AT32AP7000
  16 #define CONFIG_ATNGW100
  17
  18 #define CONFIG_SYS_HZ                           1000
  19
  20 /*
  21  * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
  22  * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
  23  * and the PBA bus to run at 1/4 the PLL frequency.
  24  */
  25 #define CONFIG_PLL
  26 #define CONFIG_SYS_POWER_MANAGER
  27 #define CONFIG_SYS_OSC0_HZ                      20000000
  28 #define CONFIG_SYS_PLL0_DIV                     1
  29 #define CONFIG_SYS_PLL0_MUL                     7
  30 #define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16
  31 #define CONFIG_SYS_CLKDIV_CPU                   0
  32 #define CONFIG_SYS_CLKDIV_HSB                   1
  33 #define CONFIG_SYS_CLKDIV_PBA                   2
  34 #define CONFIG_SYS_CLKDIV_PBB                   1
  35
  36 /* Reserve VM regions for SDRAM and NOR flash */
  37 #define CONFIG_SYS_NR_VM_REGIONS                2
  38
  39 /*
  40  * The PLLOPT register controls the PLL like this:
  41  *   icp = PLLOPT<2>
  42  *   ivco = PLLOPT<1:0>
  43  *
  44  * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
  45  */
  46 #define CONFIG_SYS_PLL0_OPT                     0x04
  47
  48 #define CONFIG_USART_BASE               ATMEL_BASE_USART1
  49 #define CONFIG_USART_ID                 1
  50 /* User serviceable stuff */
  51 #define CONFIG_DOS_PARTITION
  52
  53 #define CONFIG_CMDLINE_TAG
  54 #define CONFIG_SETUP_MEMORY_TAGS
  55 #define CONFIG_INITRD_TAG
  56
  57 #define CONFIG_STACKSIZE                (2048)
  58
  59 #define CONFIG_BAUDRATE                 115200
  60 #define CONFIG_BOOTARGS                                                 \
  61         "console=ttyS0 root=/dev/mtdblock1 rootfstype=jffs2"
  62 #define CONFIG_BOOTCOMMAND                                              \
  63         "fsload; bootm"
  64
  65 /*
  66  * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
  67  * data on the serial line may interrupt the boot sequence.
  68  */
  69 #define CONFIG_BOOTDELAY                1
  70 #define CONFIG_AUTOBOOT
  71 #define CONFIG_AUTOBOOT_KEYED
  72 #define CONFIG_AUTOBOOT_PROMPT          \
  73         "Press SPACE to abort autoboot in %d seconds\n", bootdelay
  74 #define CONFIG_AUTOBOOT_DELAY_STR       "d"
  75 #define CONFIG_AUTOBOOT_STOP_STR        " "
  76
  77 /*
  78  * After booting the board for the first time, new ethernet addresses
  79  * should be generated and assigned to the environment variables
  80  * "ethaddr" and "eth1addr". This is normally done during production.
  81  */
  82 #define CONFIG_OVERWRITE_ETHADDR_ONCE
  83
  84 /*
  85  * BOOTP/DHCP options
  86  */
  87 #define CONFIG_BOOTP_SUBNETMASK
  88 #define CONFIG_BOOTP_GATEWAY
  89
  90 /*
  91  * Command line configuration.
  92  */
  93 #include <config_cmd_default.h>
  94
  95 #define CONFIG_CMD_ASKENV
  96 #define CONFIG_CMD_DHCP
  97 #define CONFIG_CMD_EXT2
  98 #define CONFIG_CMD_FAT
  99 #define CONFIG_CMD_JFFS2
 100 #define CONFIG_CMD_MMC
 101 #define CONFIG_CMD_SF
 102 #define CONFIG_CMD_SPI
 103
 104 #undef CONFIG_CMD_FPGA
 105 #undef CONFIG_CMD_SETGETDCR
 106 #undef CONFIG_CMD_SOURCE
 107 #undef CONFIG_CMD_XIMG
 108
 109 #define CONFIG_ATMEL_USART
 110 #define CONFIG_MACB
 111 #define CONFIG_PORTMUX_PIO
 112 #define CONFIG_SYS_NR_PIOS                      5
 113 #define CONFIG_SYS_HSDRAMC
 114 #define CONFIG_MMC
 115 #define CONFIG_GENERIC_ATMEL_MCI
 116 #define CONFIG_GENERIC_MMC
 117 #define CONFIG_ATMEL_SPI
 118
 119 #define CONFIG_SPI_FLASH
 120 #define CONFIG_SPI_FLASH_ATMEL
 121
 122 #define CONFIG_SYS_DCACHE_LINESZ                32
 123 #define CONFIG_SYS_ICACHE_LINESZ                32
 124
 125 #define CONFIG_NR_DRAM_BANKS            1
 126
 127 #define CONFIG_SYS_FLASH_CFI
 128 #define CONFIG_FLASH_CFI_DRIVER
 129
 130 #define CONFIG_SYS_FLASH_BASE                   0x00000000
 131 #define CONFIG_SYS_FLASH_SIZE                   0x800000
 132 #define CONFIG_SYS_MAX_FLASH_BANKS              1
 133 #define CONFIG_SYS_MAX_FLASH_SECT               135
 134
 135 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 136 #define CONFIG_SYS_TEXT_BASE            0x00000000
 137
 138 #define CONFIG_SYS_INTRAM_BASE                  INTERNAL_SRAM_BASE
 139 #define CONFIG_SYS_INTRAM_SIZE                  INTERNAL_SRAM_SIZE
 140 #define CONFIG_SYS_SDRAM_BASE                   EBI_SDRAM_BASE
 141
 142 #define CONFIG_ENV_IS_IN_FLASH
 143 #define CONFIG_ENV_SIZE                 65536
 144 #define CONFIG_ENV_ADDR                 (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
 145
 146 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
 147
 148 #define CONFIG_SYS_MALLOC_LEN                   (256*1024)
 149 #define CONFIG_SYS_DMA_ALLOC_LEN                (16384)
 150
 151 /* Allow 4MB for the kernel run-time image */
 152 #define CONFIG_SYS_LOAD_ADDR                    (EBI_SDRAM_BASE + 0x00400000)
 153 #define CONFIG_SYS_BOOTPARAMS_LEN               (16 * 1024)
 154
 155 /* Other configuration settings that shouldn't have to change all that often */
 156 #define CONFIG_SYS_PROMPT                       "U-Boot> "
 157 #define CONFIG_SYS_CBSIZE                       256
 158 #define CONFIG_SYS_MAXARGS                      16
 159 #define CONFIG_SYS_PBSIZE                       (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 160 #define CONFIG_SYS_LONGHELP
 161
 162 #define CONFIG_SYS_MEMTEST_START                EBI_SDRAM_BASE
 163 #define CONFIG_SYS_MEMTEST_END                  (CONFIG_SYS_MEMTEST_START + 0x1f00000)
 164
 165 #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
 166
 167 #endif /* __CONFIG_H */