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1 /*
2 * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7 #ifndef _CONFIG_AXS101_H_
8 #define _CONFIG_AXS101_H_
9
10 /*
11 * CPU configuration
12 */
13 #define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
14
15 #define ARC_FPGA_PERIPHERAL_BASE 0xE0000000
16 #define ARC_APB_PERIPHERAL_BASE 0xF0000000
17 #define ARC_DWMMC_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x15000)
18 #define ARC_DWGMAC_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x18000)
19
20 /*
21 * Memory configuration
22 */
23 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
24
25 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
26 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
27 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 /* 512 Mb */
28
29 #define CONFIG_SYS_INIT_SP_ADDR \
30 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
31
32 #define CONFIG_SYS_MALLOC_LEN 0x200000 /* 2 MB */
33 #define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MB */
34 #define CONFIG_SYS_LOAD_ADDR 0x82000000
35
36 /*
37 * This board might be of different versions so handle it
38 */
39 #define CONFIG_BOARD_TYPES
40 #define CONFIG_BOARD_EARLY_INIT_F
41
42 #define CONFIG_OF_LIBFDT
43
44 /*
45 * NAND Flash configuration
46 */
47 #define CONFIG_SYS_NO_FLASH
48 #define CONFIG_SYS_NAND_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x16000)
49 #define CONFIG_SYS_MAX_NAND_DEVICE 1
50
51 /*
52 * UART configuration
53 */
54 #define CONFIG_DW_SERIAL
55 #define CONFIG_SYS_NS16550_SERIAL
56 #define CONFIG_SYS_NS16550_CLK 33333333
57 #define CONFIG_SYS_NS16550_MEM32
58 #define CONFIG_BAUDRATE 115200
59
60 /*
61 * I2C configuration
62 */
63 #define CONFIG_SYS_I2C
64 #define CONFIG_SYS_I2C_DW
65 #define CONFIG_I2C_ENV_EEPROM_BUS 2
66 #define CONFIG_SYS_I2C_SPEED 100000
67 #define CONFIG_SYS_I2C_SPEED1 100000
68 #define CONFIG_SYS_I2C_SPEED2 100000
69 #define CONFIG_SYS_I2C_SLAVE 0
70 #define CONFIG_SYS_I2C_SLAVE1 0
71 #define CONFIG_SYS_I2C_SLAVE2 0
72 #define CONFIG_SYS_I2C_BASE 0xE001D000
73 #define CONFIG_SYS_I2C_BASE1 0xE001E000
74 #define CONFIG_SYS_I2C_BASE2 0xE001F000
75 #define CONFIG_SYS_I2C_BUS_MAX 3
76 #define IC_CLK 50
77
78 /*
79 * EEPROM configuration
80 */
81 #define CONFIG_SYS_I2C_EEPROM_ADDR (0xA8 >> 1)
82 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
83 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 1
84 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
85 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 64
86
87 /*
88 * SD/MMC configuration
89 */
90 #define CONFIG_MMC
91 #define CONFIG_GENERIC_MMC
92 #define CONFIG_DWMMC
93 #define CONFIG_DOS_PARTITION
94
95 /*
96 * Ethernet PHY configuration
97 */
98 #define CONFIG_MII
99 #define CONFIG_PHY_GIGE
100
101 /*
102 * Commands still not supported in Kconfig
103 */
104 #define CONFIG_CMD_FAT
105 #define CONFIG_CMD_MMC
106 #define CONFIG_CMD_NAND
107
108 #define CONFIG_AUTO_COMPLETE
109 #define CONFIG_SYS_MAXARGS 16
110
111 /*
112 * Environment settings
113 */
114 #define CONFIG_ENV_IS_IN_EEPROM
115 #define CONFIG_ENV_SIZE 0x00200 /* 512 bytes */
116 #define CONFIG_ENV_OFFSET 0
117
118 /*
119 * Environment configuration
120 */
121 #define CONFIG_BOOTDELAY 3
122 #define CONFIG_BOOTFILE "uImage"
123 #define CONFIG_BOOTARGS "console=ttyS3,115200n8"
124 #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
125
126 /*
127 * Console configuration
128 */
129 #define CONFIG_SYS_LONGHELP
130 #define CONFIG_SYS_CBSIZE 256
131 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
132 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
133 sizeof(CONFIG_SYS_PROMPT) + 16)
134
135 /*
136 * Misc utility configuration
137 */
138 #define CONFIG_BOUNCE_BUFFER
139
140 #endif /* _CONFIG_AXS101_H_ */