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1 /*
2 * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7 #ifndef _CONFIG_AXS101_H_
8 #define _CONFIG_AXS101_H_
9
10 /*
11 * CPU configuration
12 */
13 #define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
14
15 #define ARC_FPGA_PERIPHERAL_BASE 0xE0000000
16 #define ARC_APB_PERIPHERAL_BASE 0xF0000000
17 #define ARC_DWMMC_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x15000)
18 #define ARC_DWGMAC_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x18000)
19
20 /*
21 * Memory configuration
22 */
23 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
24
25 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
26 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
27 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 /* 512 Mb */
28
29 #define CONFIG_SYS_INIT_SP_ADDR \
30 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
31
32 #define CONFIG_SYS_MALLOC_LEN 0x200000 /* 2 MB */
33 #define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MB */
34 #define CONFIG_SYS_LOAD_ADDR 0x82000000
35
36 /*
37 * This board might be of different versions so handle it
38 */
39 #define CONFIG_BOARD_TYPES
40 #define CONFIG_BOARD_EARLY_INIT_F
41
42 #define CONFIG_OF_LIBFDT
43
44 /*
45 * NAND Flash configuration
46 */
47 #define CONFIG_SYS_NO_FLASH
48 #define CONFIG_SYS_NAND_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x16000)
49 #define CONFIG_SYS_MAX_NAND_DEVICE 1
50
51 /*
52 * UART configuration
53 */
54 #define CONFIG_DW_SERIAL
55 #define CONFIG_SYS_NS16550
56 #define CONFIG_SYS_NS16550_SERIAL
57 #define CONFIG_SYS_NS16550_CLK 33333333
58 #define CONFIG_SYS_NS16550_MEM32
59 #define CONFIG_BAUDRATE 115200
60
61 /*
62 * I2C configuration
63 */
64 #define CONFIG_SYS_I2C
65 #define CONFIG_SYS_I2C_DW
66 #define CONFIG_I2C_ENV_EEPROM_BUS 2
67 #define CONFIG_SYS_I2C_SPEED 100000
68 #define CONFIG_SYS_I2C_SPEED1 100000
69 #define CONFIG_SYS_I2C_SPEED2 100000
70 #define CONFIG_SYS_I2C_SLAVE 0
71 #define CONFIG_SYS_I2C_SLAVE1 0
72 #define CONFIG_SYS_I2C_SLAVE2 0
73 #define CONFIG_SYS_I2C_BASE 0xE001D000
74 #define CONFIG_SYS_I2C_BASE1 0xE001E000
75 #define CONFIG_SYS_I2C_BASE2 0xE001F000
76 #define CONFIG_SYS_I2C_BUS_MAX 3
77 #define IC_CLK 50
78
79 /*
80 * EEPROM configuration
81 */
82 #define CONFIG_SYS_I2C_MULTI_EEPROMS
83 #define CONFIG_SYS_I2C_EEPROM_ADDR (0xA8 >> 1)
84 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
85 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 1
86 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
87 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 64
88
89 /*
90 * SD/MMC configuration
91 */
92 #define CONFIG_MMC
93 #define CONFIG_GENERIC_MMC
94 #define CONFIG_DWMMC
95 #define CONFIG_DOS_PARTITION
96
97 /*
98 * Ethernet PHY configuration
99 */
100 #define CONFIG_PHYLIB
101 #define CONFIG_MII
102 #define CONFIG_PHY_GIGE
103
104 /*
105 * Ethernet configuration
106 */
107 #define CONFIG_DW_AUTONEG
108
109 /*
110 * Commands still not supported in Kconfig
111 */
112 #define CONFIG_CMD_FAT
113 #define CONFIG_CMD_MMC
114 #define CONFIG_CMD_NAND
115
116 #define CONFIG_AUTO_COMPLETE
117 #define CONFIG_SYS_MAXARGS 16
118
119 /*
120 * Environment settings
121 */
122 #define CONFIG_ENV_IS_IN_EEPROM
123 #define CONFIG_ENV_SIZE 0x00200 /* 512 bytes */
124 #define CONFIG_ENV_OFFSET 0
125
126 /*
127 * Environment configuration
128 */
129 #define CONFIG_BOOTDELAY 3
130 #define CONFIG_BOOTFILE "uImage"
131 #define CONFIG_BOOTARGS "console=ttyS3,115200n8"
132 #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
133
134 /*
135 * Console configuration
136 */
137 #define CONFIG_SYS_LONGHELP
138 #define CONFIG_SYS_CBSIZE 256
139 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
140 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
141 sizeof(CONFIG_SYS_PROMPT) + 16)
142
143 /*
144 * Misc utility configuration
145 */
146 #define CONFIG_BOUNCE_BUFFER
147
148 #endif /* _CONFIG_AXS101_H_ */