include/configs/bf548-ezkit.h

   1 /*
   2  * U-Boot - Configuration file for BF548 STAMP board
   3  */
   4
   5 #ifndef __CONFIG_BF548_EZKIT_H__
   6 #define __CONFIG_BF548_EZKIT_H__
   7
   8 #include <asm/config-pre.h>
   9
  10 /*
  11  * Processor Settings
  12  */
  13 #define CONFIG_BFIN_CPU             bf548-0.0
  14 #define CONFIG_BFIN_BOOT_MODE       BFIN_BOOT_PARA
  15
  16 /*
  17  * Clock Settings
  18  *      CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
  19  *      SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
  20  */
  21 /* CONFIG_CLKIN_HZ is any value in Hz                                   */
  22 #define CONFIG_CLKIN_HZ                 25000000
  23 /* CLKIN_HALF controls the DF bit in PLL_CTL      0 = CLKIN             */
  24 /*                                                1 = CLKIN / 2         */
  25 #define CONFIG_CLKIN_HALF               0
  26 /* PLL_BYPASS controls the BYPASS bit in PLL_CTL  0 = do not bypass     */
  27 /*                                                1 = bypass PLL        */
  28 #define CONFIG_PLL_BYPASS               0
  29 /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL              */
  30 /* Values can range from 0-63 (where 0 means 64)                        */
  31 #define CONFIG_VCO_MULT                 21
  32 /* CCLK_DIV controls the core clock divider                             */
  33 /* Values can be 1, 2, 4, or 8 ONLY                                     */
  34 #define CONFIG_CCLK_DIV                 1
  35 /* SCLK_DIV controls the system clock divider                           */
  36 /* Values can range from 1-15                                           */
  37 #define CONFIG_SCLK_DIV                 4
  38
  39 /*
  40  * Memory Settings
  41  */
  42 #define CONFIG_MEM_ADD_WDTH     10
  43 #define CONFIG_MEM_SIZE         64
  44
  45 #define CONFIG_EBIU_DDRCTL0_VAL 0x218A83FE
  46 #define CONFIG_EBIU_DDRCTL1_VAL 0x20022222
  47 #define CONFIG_EBIU_DDRCTL2_VAL 0x00000021
  48
  49 /* Default EZ-Kit bank mapping:
  50  *      Async Bank 0 - 32MB Burst Flash
  51  *      Async Bank 1 - Ethernet
  52  *      Async Bank 2 - Nothing
  53  *      Async Bank 3 - Nothing
  54  */
  55 #define CONFIG_EBIU_AMGCTL_VAL  0xFF
  56 #define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0
  57 #define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0
  58 #define CONFIG_EBIU_FCTL_VAL    (BCLK_4)
  59 #define CONFIG_EBIU_MODE_VAL    (B0MODE_FLASH)
  60
  61 #define CONFIG_SYS_MONITOR_LEN  (1024 * 1024)
  62 #define CONFIG_SYS_MALLOC_LEN   (768 * 1024)
  63
  64 /*
  65  * Network Settings
  66  */
  67 #define ADI_CMDS_NETWORK        1
  68 #define CONFIG_SMC911X  1
  69 #define CONFIG_SMC911X_BASE     0x24000000
  70 #define CONFIG_SMC911X_16_BIT
  71 #define CONFIG_HOSTNAME         bf548-ezkit
  72
  73 /*
  74  * Flash Settings
  75  */
  76 #define CONFIG_FLASH_CFI_DRIVER
  77 #define CONFIG_SYS_FLASH_BASE           0x20000000
  78 #define CONFIG_SYS_FLASH_CFI
  79 #define CONFIG_SYS_FLASH_PROTECTION
  80 #define CONFIG_SYS_MAX_FLASH_BANKS      1
  81 #define CONFIG_SYS_MAX_FLASH_SECT       259
  82
  83 /*
  84  * SPI Settings
  85  */
  86 #define CONFIG_BFIN_SPI
  87 #define CONFIG_ENV_SPI_MAX_HZ   30000000
  88 #define CONFIG_SF_DEFAULT_SPEED 30000000
  89
  90 /*
  91  * Env Storage Settings
  92  */
  93 #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)
  94 #define CONFIG_ENV_IS_IN_SPI_FLASH
  95 #define CONFIG_ENV_OFFSET       0x10000
  96 #define CONFIG_ENV_SIZE         0x2000
  97 #define CONFIG_ENV_SECT_SIZE    0x10000
  98 #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
  99 #elif (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND)
 100 #define CONFIG_ENV_IS_IN_NAND
 101 #define CONFIG_ENV_OFFSET       0x60000
 102 #define CONFIG_ENV_SIZE         0x20000
 103 #else
 104 /* The BF548-EZKIT uses a top boot flash */
 105 #define CONFIG_ENV_IS_IN_FLASH  1
 106 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
 107 #define CONFIG_ENV_OFFSET       (0x1000000 - CONFIG_ENV_SECT_SIZE)
 108 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
 109 #define CONFIG_ENV_SECT_SIZE    0x8000
 110 #endif
 111
 112 /*
 113  * NAND Settings
 114  */
 115 #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND)
 116 #define CONFIG_BFIN_NFC_CTL_VAL        0x0033
 117 #define CONFIG_BFIN_NFC_BOOTROM_ECC
 118 #define CONFIG_DRIVER_NAND_BFIN
 119 #define CONFIG_SYS_NAND_BASE           0 /* not actually used */
 120 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 121 #endif
 122
 123 /*
 124  * I2C Settings
 125  */
 126 #define CONFIG_SYS_I2C
 127 #define CONFIG_SYS_I2C_ADI
 128
 129 /*
 130  * SATA
 131  */
 132 #if !defined(__ADSPBF544__)
 133 #define CONFIG_LIBATA
 134 #define CONFIG_SYS_SATA_MAX_DEVICE 1
 135 #define CONFIG_LBA48
 136 #define CONFIG_PATA_BFIN
 137 #define CONFIG_BFIN_ATAPI_BASE_ADDR     0xFFC03800
 138 #define CONFIG_BFIN_ATA_MODE    XFER_PIO_4
 139 #endif
 140
 141 /*
 142  * SDH Settings
 143  */
 144 #if !defined(__ADSPBF544__)
 145 #define CONFIG_GENERIC_MMC
 146 #define CONFIG_BFIN_SDH
 147 #endif
 148
 149 /*
 150  * USB Settings
 151  */
 152 #if !defined(__ADSPBF544__)
 153 #define CONFIG_USB_MUSB_HCD
 154 #define CONFIG_USB_BLACKFIN
 155 #define CONFIG_USB_MUSB_TIMEOUT 100000
 156 #endif
 157
 158 /*
 159  * Misc Settings
 160  */
 161 #define CONFIG_BOARD_SIZE_LIMIT $$(( 512 * 1024 ))
 162 #define CONFIG_RTC_BFIN
 163 #define CONFIG_UART_CONSOLE     1
 164 #define CONFIG_BFIN_SPI_IMG_SIZE 0x50000
 165
 166 #define CONFIG_ADI_GPIO2
 167
 168 #ifdef CONFIG_VIDEO
 169 #define EASYLOGO_HEADER < asm/bfin_logo_230x230_gzip.h >
 170 #define CONFIG_DEB_DMA_URGENT
 171 #endif
 172
 173 /* Define if want to do post memory test */
 174 #undef CONFIG_POST
 175 #ifdef CONFIG_POST
 176 #define CONFIG_POST_BSPEC1_GPIO_LEDS \
 177         GPIO_PG6, GPIO_PG7, GPIO_PG8, GPIO_PG9, GPIO_PG10, GPIO_PG11,
 178 #define CONFIG_POST_BSPEC2_GPIO_BUTTONS \
 179         GPIO_PB8, GPIO_PB9, GPIO_PB10, GPIO_PB11
 180 #define CONFIG_POST_BSPEC2_GPIO_NAMES \
 181         13, 12, 11, 10,
 182 #define CONFIG_SYS_POST_FLASH_START     10
 183 #define CONFIG_SYS_POST_FLASH_END       127
 184 #endif
 185
 186 /*
 187  * Pull in common ADI header for remaining command/environment setup
 188  */
 189 #include <configs/bfin_adi_common.h>
 190
 191 #endif