]> git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/bf561-ezkit.h
Blackfin: move CONFIG_BFIN_CPU back to board config.h
[people/ms/u-boot.git] / include / configs / bf561-ezkit.h
1 /*
2 * U-boot - Configuration file for BF561 EZKIT board
3 */
4
5 #ifndef __CONFIG_BF561_EZKIT_H__
6 #define __CONFIG_BF561_EZKIT_H__
7
8 #include <asm/config-pre.h>
9
10
11 /*
12 * Processor Settings
13 */
14 #define CONFIG_BFIN_CPU bf561-0.3
15 #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
16
17
18 /*
19 * Clock Settings
20 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
21 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
22 */
23 /* CONFIG_CLKIN_HZ is any value in Hz */
24 #define CONFIG_CLKIN_HZ 30000000
25 /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
26 /* 1 = CLKIN / 2 */
27 #define CONFIG_CLKIN_HALF 0
28 /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
29 /* 1 = bypass PLL */
30 #define CONFIG_PLL_BYPASS 0
31 /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
32 /* Values can range from 0-63 (where 0 means 64) */
33 #define CONFIG_VCO_MULT 20
34 /* CCLK_DIV controls the core clock divider */
35 /* Values can be 1, 2, 4, or 8 ONLY */
36 #define CONFIG_CCLK_DIV 1
37 /* SCLK_DIV controls the system clock divider */
38 /* Values can range from 1-15 */
39 #define CONFIG_SCLK_DIV 6
40
41
42 /*
43 * Memory Settings
44 */
45 #define CONFIG_MEM_ADD_WDTH 9
46 #define CONFIG_MEM_SIZE 64
47
48 #define CONFIG_EBIU_SDRRC_VAL 0x306
49 #define CONFIG_EBIU_SDGCTL_VAL 0x91114d
50
51 #define CONFIG_EBIU_AMGCTL_VAL 0x3F
52 #define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0
53 #define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0
54
55 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
56 #define CONFIG_SYS_MALLOC_LEN (128 * 1024)
57
58
59 /*
60 * Network Settings
61 */
62 #define ADI_CMDS_NETWORK 1
63 #define CONFIG_NET_MULTI
64 #define CONFIG_SMC91111 1
65 #define CONFIG_SMC91111_BASE 0x2C010300
66 #define CONFIG_SMC_USE_32_BIT 1
67 #define CONFIG_HOSTNAME bf561-ezkit
68 /* Uncomment next line to use fixed MAC address */
69 /* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
70
71
72 /*
73 * Flash Settings
74 */
75 #define CONFIG_SYS_FLASH_CFI
76 #define CONFIG_FLASH_CFI_DRIVER
77 #define CONFIG_SYS_FLASH_CFI_AMD_RESET
78 #define CONFIG_SYS_FLASH_BASE 0x20000000
79 #define CONFIG_SYS_MAX_FLASH_BANKS 1
80 #define CONFIG_SYS_MAX_FLASH_SECT 135
81 /* The BF561-EZKIT uses a top boot flash */
82 #define CONFIG_ENV_IS_IN_FLASH 1
83 #define CONFIG_ENV_ADDR 0x20004000
84 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
85 #define CONFIG_ENV_SIZE 0x2000
86 #define CONFIG_ENV_SECT_SIZE 0x10000
87 #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
88 #define ENV_IS_EMBEDDED
89 #else
90 #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
91 #endif
92 #ifdef ENV_IS_EMBEDDED
93 /* WARNING - the following is hand-optimized to fit within
94 * the sector before the environment sector. If it throws
95 * an error during compilation remove an object here to get
96 * it linked after the configuration sector.
97 */
98 # define LDS_BOARD_TEXT \
99 arch/blackfin/lib/libblackfin.o (.text*); \
100 arch/blackfin/cpu/libblackfin.o (.text*); \
101 . = DEFINED(env_offset) ? env_offset : .; \
102 common/env_embedded.o (.text*);
103 #endif
104
105
106 /*
107 * I2C Settings
108 */
109 #define CONFIG_SOFT_I2C
110 #define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0
111 #define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1
112
113
114 /*
115 * Misc Settings
116 */
117 #define CONFIG_UART_CONSOLE 0
118
119
120 /*
121 * Pull in common ADI header for remaining command/environment setup
122 */
123 #include <configs/bfin_adi_common.h>
124
125 #endif