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1 /*
2 * U-Boot - Configuration file for BlackStamp board
3 * Configuration by Ben Matthews for UR LLE using bf533-stamp.h
4 * as a template
5 * See http://blackfin.uclinux.org/gf/project/blackstamp/
6 */
7
8 #ifndef __CONFIG_BLACKSTAMP_H__
9 #define __CONFIG_BLACKSTAMP_H__
10
11 #include <asm/config-pre.h>
12
13 /*
14 * Debugging: Set these options if you're having problems
15 */
16 /*
17 * #define CONFIG_DEBUG_EARLY_SERIAL
18 * #define DEBUG
19 * #define CONFIG_DEBUG_DUMP
20 * #define CONFIG_DEBUG_DUMP_SYMS
21 */
22 #define CONFIG_PANIC_HANG 0
23
24 /* CPU Options
25 * Be sure to set the Silicon Revision Correctly
26 */
27 #define CONFIG_BFIN_CPU bf532-0.5
28 #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
29
30 /*
31 * Board settings
32 */
33 #define CONFIG_SMC91111 1
34 #define CONFIG_SMC91111_BASE 0x20300300
35
36 /* FLASH/ETHERNET uses the same address range
37 * Depending on what you have the CPLD doing
38 * this probably isn't needed
39 */
40 #define SHARED_RESOURCES 1
41
42 /* Is I2C bit-banged? */
43
44 /*
45 * Clock Settings
46 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
47 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
48 */
49 /* CONFIG_CLKIN_HZ is any value in Hz */
50 #define CONFIG_CLKIN_HZ 25000000
51 /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
52 /* 1 = CLKIN / 2 */
53 #define CONFIG_CLKIN_HALF 0
54 /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
55 /* 1 = bypass PLL */
56 #define CONFIG_PLL_BYPASS 0
57 /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
58 /* Values can range from 0-63 (where 0 means 64) */
59 #define CONFIG_VCO_MULT 16
60 /* CCLK_DIV controls the core clock divider */
61 /* Values can be 1, 2, 4, or 8 ONLY */
62 #define CONFIG_CCLK_DIV 1
63 /* SCLK_DIV controls the system clock divider */
64 /* Values can range from 1-15 */
65 #define CONFIG_SCLK_DIV 3
66
67 /*
68 * Network settings
69 */
70
71 #ifdef CONFIG_SMC91111
72 #define CONFIG_IPADDR 192.168.0.15
73 #define CONFIG_NETMASK 255.255.255.0
74 #define CONFIG_GATEWAYIP 192.168.0.1
75 #define CONFIG_SERVERIP 192.168.0.2
76 #define CONFIG_HOSTNAME blackstamp
77 #define CONFIG_ROOTPATH "/checkout/uClinux-dist/romfs"
78 #define CONFIG_SYS_AUTOLOAD "no"
79 #endif
80
81 #define CONFIG_ENV_IS_IN_SPI_FLASH
82 #define CONFIG_ENV_OFFSET 0x40000
83 #define CONFIG_ENV_SIZE 0x2000
84 #define CONFIG_ENV_SECT_SIZE 0x40000
85
86 /*
87 * SDRAM settings & memory map
88 */
89
90 #define CONFIG_MEM_SIZE 64 /* 128, 64, 32, 16 */
91 #define CONFIG_MEM_ADD_WDTH 10 /* 8, 9, 10, 11 */
92
93 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
94 #define CONFIG_SYS_MALLOC_LEN (384 << 10)
95
96 /*
97 * Command settings
98 */
99
100 #define CONFIG_SYS_LONGHELP 1
101 #define CONFIG_CMDLINE_EDITING 1
102 #define CONFIG_AUTO_COMPLETE 1
103 #define CONFIG_ENV_OVERWRITE 1
104
105 #define CONFIG_CMD_BOOTLDR
106 #define CONFIG_CMD_CPLBINFO
107 #define CONFIG_CMD_DATE
108
109 #define CONFIG_BOOTCOMMAND "run ramboot"
110 #define CONFIG_BOOTARGS \
111 "root=/dev/mtdblock0 rw " \
112 "clkin_hz=" __stringify(CONFIG_CLKIN_HZ) " " \
113 "earlyprintk=" \
114 "serial," \
115 "uart" __stringify(CONFIG_UART_CONSOLE) "," \
116 __stringify(CONFIG_BAUDRATE) " " \
117 "console=ttyBF0," __stringify(CONFIG_BAUDRATE)
118
119 #if defined(CONFIG_CMD_NET)
120 # if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
121 # define UBOOT_ENV_FILE "u-boot.bin"
122 # else
123 # define UBOOT_ENV_FILE "u-boot.ldr"
124 # endif
125 # if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)
126 # ifdef CONFIG_SPI
127 # define UBOOT_ENV_UPDATE \
128 "eeprom write $(loadaddr) 0x0 $(filesize)"
129 # else
130 # define UBOOT_ENV_UPDATE \
131 "sf probe " __stringify(BFIN_BOOT_SPI_SSEL) ";" \
132 "sf erase 0 0x40000;" \
133 "sf write $(loadaddr) 0 $(filesize)"
134 # endif
135 # else
136 # define UBOOT_ENV_UPDATE \
137 "protect off 0x20000000 0x2003FFFF;" \
138 "erase 0x20000000 0x2003FFFF;" \
139 "cp.b $(loadaddr) 0x20000000 $(filesize)"
140 # endif
141 # define NETWORK_ENV_SETTINGS \
142 "ubootfile=" UBOOT_ENV_FILE "\0" \
143 "update=" \
144 "tftp $(loadaddr) $(ubootfile);" \
145 UBOOT_ENV_UPDATE \
146 "\0" \
147 "addip=set bootargs $(bootargs) " \
148 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):" \
149 "$(hostname):eth0:off" \
150 "\0" \
151 "ramargs=set bootargs " CONFIG_BOOTARGS "\0" \
152 "ramboot=" \
153 "tftp $(loadaddr) uImage;" \
154 "run ramargs;" \
155 "run addip;" \
156 "bootm" \
157 "\0" \
158 "nfsargs=set bootargs " \
159 "root=/dev/nfs rw " \
160 "nfsroot=$(serverip):$(rootpath),tcp,nfsvers=3" \
161 "\0" \
162 "nfsboot=" \
163 "tftp $(loadaddr) vmImage;" \
164 "run nfsargs;" \
165 "run addip;" \
166 "bootm" \
167 "\0"
168 #else
169 # define NETWORK_ENV_SETTINGS
170 #endif
171
172 /*
173 * Console settings
174 */
175 #define CONFIG_BAUDRATE 57600
176 #define CONFIG_LOADS_ECHO 1
177 #define CONFIG_UART_CONSOLE 0
178 #define CONFIG_BFIN_SERIAL
179
180 /*
181 * I2C settings
182 * By default PF2 is used as SDA and PF3 as SCL on the Stamp board
183 * Located on the expansion connector on pins 86/85
184 * Note these pins are arbitrarily chosen because we aren't using
185 * them yet. You can (and probably should) change these values!
186 */
187 #ifdef CONFIG_SYS_I2C_SOFT
188 #define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF9
189 #define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF8
190 #define CONFIG_SYS_I2C_SOFT_SPEED 50000
191 #define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
192 #endif
193
194 /*
195 * Miscellaneous configurable options
196 */
197 #define CONFIG_RTC_BFIN 1
198
199 /*
200 * Serial Flash Infomation
201 */
202 #define CONFIG_BFIN_SPI
203 /* For the M25P64 SCK Should be Kept < 15Mhz */
204 #define CONFIG_ENV_SPI_MAX_HZ 15000000
205 #define CONFIG_SF_DEFAULT_SPEED 15000000
206
207 /*
208 * FLASH organization and environment definitions
209 */
210
211 #define CONFIG_EBIU_AMGCTL_VAL 0xFF
212 #define CONFIG_EBIU_AMBCTL0_VAL 0xBBC3BBC3
213 #define CONFIG_EBIU_AMBCTL1_VAL 0x99B39983
214 #define CONFIG_EBIU_SDRRC_VAL 0x268
215 #define CONFIG_EBIU_SDGCTL_VAL 0x911109
216
217 #undef CONFIG_CMD_JFFS2
218
219 #endif