include/configs/bur_am335x_common.h

   1 /*
   2  * bur_am335x_common.h
   3  *
   4  * common parts used by B&R AM335x based boards
   5  *
   6  * Copyright (C) 2016 Hannes Schmelzer <oe5hpm@oevsv.at> -
   7  * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
   8  *
   9  * SPDX-License-Identifier:        GPL-2.0+
  10  */
  11
  12 #ifndef __BUR_AM335X_COMMON_H__
  13 #define __BUR_AM335X_COMMON_H__
  14 /* ------------------------------------------------------------------------- */
  15 #define CONFIG_AM33XX
  16 #define CONFIG_OMAP
  17 #define CONFIG_OMAP_COMMON
  18 #define CONFIG_MAX_RAM_BANK_SIZE        (1024 << 20)    /* 1GB */
  19
  20 /* Timer information */
  21 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
  22 #define CONFIG_SYS_TIMERBASE            0x48040000      /* Use Timer2 */
  23 #define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC     /* enable 32kHz OSC at bootime */
  24 #define CONFIG_SPL_POWER_SUPPORT
  25 #define CONFIG_POWER_TPS65217
  26
  27 #define CONFIG_SYS_NO_FLASH             /* have no NOR-flash */
  28
  29 #include <asm/arch/omap.h>
  30
  31 /* NS16550 Configuration */
  32 #define CONFIG_SYS_NS16550_SERIAL
  33 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  34 #define CONFIG_SYS_NS16550_CLK          48000000
  35 #define CONFIG_SYS_NS16550_COM1         0x44e09000      /* UART0 */
  36 #define CONFIG_BAUDRATE                 115200
  37
  38 /* Network defines */
  39 #define CONFIG_DRIVER_TI_CPSW           /* Driver for IP block */
  40 #define CONFIG_MII                      /* Required in net/eth.c */
  41 #define CONFIG_PHYLIB
  42 #define CONFIG_PHY_NATSEMI
  43
  44 /*
  45  * SPL related defines.  The Public RAM memory map the ROM defines the
  46  * area between 0x402F0400 and 0x4030B800 as a download area and
  47  * 0x4030B800 to 0x4030CE00 as a public stack area.  The ROM also
  48  * supports X-MODEM loading via UART, and we leverage this and then use
  49  * Y-MODEM to load u-boot.img, when booted over UART.
  50  */
  51 #define CONFIG_SPL_TEXT_BASE            0x402F0400
  52 #define CONFIG_SPL_MAX_SIZE             (0x4030B800 - CONFIG_SPL_TEXT_BASE)
  53
  54 /*
  55  * Since SPL did pll and ddr initialization for us,
  56  * we don't need to do it twice.
  57  */
  58 #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT)
  59 #define CONFIG_SKIP_LOWLEVEL_INIT
  60 #endif /* !CONFIG_SPL_BUILD, ... */
  61 /*
  62  * Our DDR memory always starts at 0x80000000 and U-Boot shall have
  63  * relocated itself to higher in memory by the time this value is used.
  64  */
  65 #define CONFIG_SYS_LOAD_ADDR            0x80000000
  66 /*
  67  * ----------------------------------------------------------------------------
  68  * DDR information.  We say (for simplicity) that we have 1 bank,
  69  * always, even when we have more.  We always start at 0x80000000,
  70  * and we place the initial stack pointer in our SRAM.
  71  */
  72 #define CONFIG_NR_DRAM_BANKS            1
  73 #define CONFIG_SYS_SDRAM_BASE           0x80000000
  74 #define CONFIG_SYS_INIT_SP_ADDR         (NON_SECURE_SRAM_END - \
  75                                         GENERATED_GBL_DATA_SIZE)
  76
  77 /* I2C */
  78 #define CONFIG_SYS_I2C
  79 #define CONFIG_SYS_OMAP24_I2C_SPEED     100000
  80 #define CONFIG_SYS_OMAP24_I2C_SLAVE     1
  81 #define CONFIG_SYS_I2C_OMAP24XX
  82 /* GPIO */
  83 #define CONFIG_OMAP_GPIO
  84
  85 /*
  86  * Our platforms make use of SPL to initalize the hardware (primarily
  87  * memory) enough for full U-Boot to be loaded.  We also support Falcon
  88  * Mode so that the Linux kernel can be booted directly from SPL
  89  * instead, if desired.  We make use of the general SPL framework found
  90  * under common/spl/.  Given our generally common memory map, we set a
  91  * number of related defaults and sizes here.
  92  */
  93 #define CONFIG_SPL_FRAMEWORK
  94 /*
  95  * Place the image at the start of the ROM defined image space.
  96  * We limit our size to the ROM-defined downloaded image area, and use the
  97  * rest of the space for stack.  We load U-Boot itself into memory at
  98  * 0x80800000 for legacy reasons (to not conflict with older SPLs).  We
  99  * have our BSS be placed 1MiB after this, to allow for the default
 100  * Linux kernel address of 0x80008000 to work, in the Falcon Mode case.
 101  * We have the SPL malloc pool at the end of the BSS area.
 102  *
 103  * ----------------------------------------------------------------------------
 104  */
 105 #undef  CONFIG_SYS_TEXT_BASE
 106 #define CONFIG_SYS_TEXT_BASE            0x80800000
 107 #define CONFIG_SPL_BSS_START_ADDR       0x80A00000
 108 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
 109 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
 110                                         CONFIG_SPL_BSS_MAX_SIZE)
 111 #define CONFIG_SYS_SPL_MALLOC_SIZE      CONFIG_SYS_MALLOC_LEN
 112
 113 /* General parts of the framework, required. */
 114 #define CONFIG_SPL_I2C_SUPPORT
 115 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 116 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 117 #define CONFIG_SPL_SERIAL_SUPPORT
 118 #define CONFIG_SPL_BOARD_INIT
 119 #define CONFIG_SPL_YMODEM_SUPPORT
 120 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/am33xx/u-boot-spl.lds"
 121
 122 #endif  /* ! __BUR_AM335X_COMMON_H__ */