include/configs/canmb.h

   1 /*
   2  * (C) Copyright 2005
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef __CONFIG_H
   9 #define __CONFIG_H
  10
  11 /*
  12  * High Level Configuration Options
  13  * (easy to change)
  14  */
  15
  16 #define CONFIG_MPC5200          1       /* This is a MPC5200 CPU */
  17 #define CONFIG_CANMB            1       /* ... on canmb board - we need this for FEC.C */
  18
  19 /*
  20  * allowed and functional CONFIG_SYS_TEXT_BASE values:
  21  * 0xfe000000   low boot at 0x00000100 (default board setting)
  22  * 0x00100000   RAM load and test
  23  */
  24 #define CONFIG_SYS_TEXT_BASE    0xFE000000
  25
  26 #define CONFIG_SYS_MPC5XXX_CLKIN        33000000 /* ... running at 33.000000MHz */
  27
  28 #define CONFIG_BOARD_EARLY_INIT_R
  29
  30 #define CONFIG_HIGH_BATS        1       /* High BATs supported */
  31
  32 /*
  33  * Serial console configuration
  34  */
  35 #define CONFIG_PSC_CONSOLE      1       /* console is on PSC1 */
  36 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200, 230400 }
  37
  38 /*
  39  * BOOTP options
  40  */
  41 #define CONFIG_BOOTP_BOOTFILESIZE
  42 #define CONFIG_BOOTP_BOOTPATH
  43 #define CONFIG_BOOTP_GATEWAY
  44 #define CONFIG_BOOTP_HOSTNAME
  45
  46 /*
  47  * Command line configuration.
  48  */
  49 #define CONFIG_CMD_DATE
  50 #define CONFIG_CMD_IMMAP
  51 #define CONFIG_CMD_REGINFO
  52
  53 /*
  54  * MUST be low boot - HIGHBOOT is not supported anymore
  55  */
  56 #if (CONFIG_SYS_TEXT_BASE == 0xFE000000)                /* Boot low with 32 MB Flash */
  57 #   define CONFIG_SYS_LOWBOOT           1
  58 #   define CONFIG_SYS_LOWBOOT16 1
  59 #else
  60 #   error "CONFIG_SYS_TEXT_BASE must be 0xFE000000"
  61 #endif
  62
  63 /*
  64  * Autobooting
  65  */
  66
  67 #define CONFIG_PREBOOT  "echo;" \
  68         "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
  69         "echo"
  70
  71 #undef  CONFIG_BOOTARGS
  72
  73 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
  74         "netdev=eth0\0"                                                 \
  75         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
  76                 "nfsroot=${serverip}:${rootpath}\0"                     \
  77         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
  78         "addip=setenv bootargs ${bootargs} "                            \
  79                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
  80                 ":${hostname}:${netdev}:off panic=1\0"                  \
  81         "flash_nfs=run nfsargs addip;"                                  \
  82                 "bootm ${kernel_addr}\0"                                \
  83         "flash_self=run ramargs addip;"                                 \
  84                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
  85         "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0"     \
  86         "rootpath=/opt/eldk/ppc_6xx\0"                                  \
  87         "bootfile=/tftpboot/canmb/uImage\0"                             \
  88         ""
  89
  90 #define CONFIG_BOOTCOMMAND      "run flash_self"
  91
  92 /*
  93  * IPB Bus clocking configuration.
  94  */
  95 #undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK          /* define for 133MHz speed */
  96
  97 /*
  98  * Flash configuration, expect one 16 Megabyte Bank at most
  99  */
 100 #define CONFIG_SYS_FLASH_BASE           0xFE000000
 101 #define CONFIG_SYS_FLASH_SIZE           0x02000000
 102 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max num of memory banks      */
 103 #define CONFIG_SYS_MAX_FLASH_SECT       256     /* max num of sects on one chip */
 104
 105 #define CONFIG_SYS_FLASH_ERASE_TOUT     240000  /* Flash Erase Timeout (in ms)  */
 106 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Flash Write Timeout (in ms)  */
 107
 108 #define CONFIG_FLASH_CFI_DRIVER
 109 #define CONFIG_SYS_FLASH_CFI
 110 #define CONFIG_SYS_FLASH_EMPTY_INFO
 111
 112 /*
 113  * Environment settings
 114  */
 115 #define CONFIG_ENV_IS_IN_FLASH  1
 116 #define CONFIG_ENV_OFFSET               (2*128*1024)
 117 #define CONFIG_ENV_SIZE         0x2000
 118 #define CONFIG_ENV_SECT_SIZE       (128*1024)
 119
 120 /*
 121  * Memory map
 122  *
 123  * Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000
 124  */
 125 #define CONFIG_SYS_MBAR                 0xf0000000      /* DO NOT CHANGE this */
 126 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 127 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
 128
 129 /* Use SRAM until RAM will be available */
 130 #define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
 131 #define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_SIZE       /* Size of used area in DPRAM */
 132
 133 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 134 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 135
 136 #define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
 137 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 138 #   define CONFIG_SYS_RAMBOOT           1
 139 #endif
 140
 141 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 256 kB for Monitor   */
 142 #define CONFIG_SYS_MALLOC_LEN           (128 << 10)     /* Reserve 128 kB for malloc()  */
 143 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)       /* Initial Memory map for Linux */
 144
 145 /*
 146  * Ethernet configuration
 147  */
 148 #define CONFIG_MPC5xxx_FEC      1
 149 #define CONFIG_MPC5xxx_FEC_MII100
 150 #define CONFIG_PHY_ADDR         0x0
 151 /*
 152  * GPIO configuration:
 153  * PSC1,2,3 predefined as UART
 154  * PCI disabled
 155  * Ethernet 100 with MD
 156  */
 157 #define CONFIG_SYS_GPS_PORT_CONFIG      0x00058444
 158
 159 /*
 160  * Miscellaneous configurable options
 161  */
 162 #define CONFIG_SYS_LONGHELP                     /* undef to save memory     */
 163 #if defined(CONFIG_CMD_KGDB)
 164 #  define CONFIG_SYS_CBSIZE             1024    /* Console I/O Buffer Size  */
 165 #else
 166 #  define CONFIG_SYS_CBSIZE             256     /* Console I/O Buffer Size  */
 167 #endif
 168 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)      /* Print Buffer Size */
 169 #define CONFIG_SYS_MAXARGS              16              /* max number of command args   */
 170 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 171
 172 #define CONFIG_SYS_MEMTEST_START        0x00100000      /* memtest works on */
 173 #define CONFIG_SYS_MEMTEST_END          0x01f00000      /* 1 ... 31 MB in DRAM  */
 174
 175 #define CONFIG_SYS_LOAD_ADDR            0x200000        /* default load address */
 176
 177 #define CONFIG_RTC_MPC5200      1       /* use internal MPC5200 RTC */
 178
 179 #define CONFIG_SYS_CACHELINE_SIZE       32      /* For MPC5xxx CPUs */
 180 #if defined(CONFIG_CMD_KGDB)
 181 #  define CONFIG_SYS_CACHELINE_SHIFT    5       /* log base 2 of the above value */
 182 #endif
 183
 184 /*
 185  * Various low-level settings
 186  */
 187 #define CONFIG_SYS_HID0_INIT            HID0_ICE | HID0_ICFI
 188 #define CONFIG_SYS_HID0_FINAL           HID0_ICE
 189
 190 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
 191 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
 192 #define CONFIG_SYS_BOOTCS_CFG           0x00047D01
 193 #define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
 194 #define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
 195
 196 #define CONFIG_SYS_CS_BURST             0x00000000
 197 #define CONFIG_SYS_CS_DEADCYCLE 0x33333333
 198
 199 #define CONFIG_SYS_RESET_ADDRESS        0x7f000000
 200
 201 #endif /* __CONFIG_H */