include/configs/cm5200.h

   1 /*
   2  * (C) Copyright 2003-2007
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef __CONFIG_H
   9 #define __CONFIG_H
  10
  11
  12 #define CONFIG_SYS_GENERIC_BOARD
  13 #define CONFIG_DISPLAY_BOARDINFO
  14
  15
  16 /*
  17  * High Level Configuration Options
  18  */
  19 #define CONFIG_MPC5200          1       /* This is an MPC5200 CPU */
  20 #define CONFIG_CM5200           1       /* ... on CM5200 platform */
  21
  22 #define CONFIG_SYS_TEXT_BASE    0xfc000000
  23
  24 #define CONFIG_HIGH_BATS        1       /* High BATs supported */
  25
  26 /*
  27  * Supported commands
  28  */
  29 #include <config_cmd_default.h>
  30
  31 #define CONFIG_CMD_ASKENV
  32 #define CONFIG_CMD_BSP
  33 #define CONFIG_CMD_DATE
  34 #define CONFIG_CMD_DHCP
  35 #define CONFIG_CMD_DIAG
  36 #define CONFIG_CMD_FAT
  37 #define CONFIG_CMD_I2C
  38 #define CONFIG_CMD_JFFS2
  39 #define CONFIG_CMD_MII
  40 #define CONFIG_CMD_NFS
  41 #define CONFIG_CMD_PING
  42 #define CONFIG_CMD_REGINFO
  43 #define CONFIG_CMD_SNTP
  44 #define CONFIG_CMD_USB
  45
  46 /*
  47  * Serial console configuration
  48  */
  49 #define CONFIG_PSC_CONSOLE      1       /* console is on PSC1 */
  50 #define CONFIG_BAUDRATE         57600   /* ... at 57600 bps */
  51 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200, 230400 }
  52 #define CONFIG_SILENT_CONSOLE   1       /* needed to silence i2c_init() */
  53
  54 /*
  55  * Ethernet configuration
  56  */
  57 #define CONFIG_MPC5xxx_FEC      1
  58 #define CONFIG_MPC5xxx_FEC_MII100
  59 #define CONFIG_PHY_ADDR         0x00
  60 #define CONFIG_ENV_OVERWRITE    1       /* allow overwriting of ethaddr */
  61 /* use misc_init_r() to read ethaddr from I2C EEPROM (see CONFIG_SYS_I2C_EEPROM) */
  62 #define CONFIG_MISC_INIT_R      1
  63 #define CONFIG_MAC_OFFSET       0x35    /* MAC address offset in I2C EEPROM */
  64
  65 /*
  66  * POST support
  67  */
  68 #define CONFIG_POST             (CONFIG_SYS_POST_MEMORY | CONFIG_SYS_POST_CPU | CONFIG_SYS_POST_I2C)
  69 #define MPC5XXX_SRAM_POST_SIZE  (MPC5XXX_SRAM_SIZE - 4)
  70 /* List of I2C addresses to be verified by POST */
  71 #define CONFIG_SYS_POST_I2C_ADDRS       {CONFIG_SYS_I2C_SLAVE,  \
  72                                          CONFIG_SYS_I2C_IO,     \
  73                                          CONFIG_SYS_I2C_EEPROM}
  74
  75 /* display image timestamps */
  76 #define CONFIG_TIMESTAMP        1
  77
  78 /*
  79  * Autobooting
  80  */
  81 #define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds */
  82 #define CONFIG_PREBOOT  "echo;" \
  83         "echo Type \"run net_nfs_fdt\" to mount root filesystem over NFS;" \
  84         "echo"
  85 #undef CONFIG_BOOTARGS
  86
  87 /*
  88  * Default environment settings
  89  */
  90 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
  91         "netdev=eth0\0"                                                 \
  92         "netmask=255.255.0.0\0"                                         \
  93         "ipaddr=192.168.160.33\0"                                       \
  94         "serverip=192.168.1.1\0"                                        \
  95         "gatewayip=192.168.1.1\0"                                       \
  96         "console=ttyPSC0\0"                                             \
  97         "u-boot_addr=100000\0"                                          \
  98         "kernel_addr=200000\0"                                          \
  99         "kernel_addr_flash=fc0c0000\0"                                  \
 100         "fdt_addr=400000\0"                                             \
 101         "fdt_addr_flash=fc0a0000\0"                                     \
 102         "ramdisk_addr=500000\0"                                         \
 103         "rootpath=/opt/eldk-4.1/ppc_6xx\0"                              \
 104         "u-boot=/tftpboot/cm5200/u-boot.bin\0"                          \
 105         "bootfile_fdt=/tftpboot/cm5200/uImage\0"                        \
 106         "fdt_file=/tftpboot/cm5200/cm5200.dtb\0"                        \
 107         "load=tftp ${u-boot_addr} ${u-boot}\0"                          \
 108         "update=prot off fc000000 +${filesize}; "                       \
 109                 "era fc000000 +${filesize}; "                           \
 110                 "cp.b ${u-boot_addr} fc000000 ${filesize}; "            \
 111                 "prot on fc000000 +${filesize}\0"                       \
 112         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 113                 "nfsroot=${serverip}:${rootpath}\0"                     \
 114         "flashargs=setenv bootargs root=/dev/mtdblock5 rw\0"            \
 115         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
 116         "addinit=setenv bootargs ${bootargs} init=/linuxrc\0"           \
 117         "addcons=setenv bootargs ${bootargs} "                          \
 118                 "console=${console},${baudrate}\0"                      \
 119         "addip=setenv bootargs ${bootargs} "                            \
 120                 "ip=${ipaddr}:${serverip}:${gatewayip}:"                \
 121                 "${netmask}:${hostname}:${netdev}:off panic=1\0"        \
 122         "flash_flash=run flashargs addinit addip addcons;"              \
 123                 "bootm ${kernel_addr_flash} - ${fdt_addr_flash}\0"      \
 124         "net_nfs_fdt=tftp ${kernel_addr} ${bootfile_fdt}; "             \
 125                 "tftp ${fdt_addr} ${fdt_file}; run nfsargs addip "      \
 126                 "addcons; bootm ${kernel_addr} - ${fdt_addr}\0"         \
 127         ""
 128 #define CONFIG_BOOTCOMMAND      "run flash_flash"
 129
 130 /*
 131  * Low level configuration
 132  */
 133
 134 /*
 135  * Clock configuration
 136  */
 137 #define CONFIG_SYS_MPC5XXX_CLKIN        33000000        /* SYS_XTAL_IN = 33MHz */
 138 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK 1       /* IPB = 133MHz */
 139
 140 /*
 141  * Memory map
 142  */
 143 #define CONFIG_SYS_MBAR         0xF0000000
 144 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 145 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
 146
 147 #define CONFIG_SYS_LOWBOOT              1
 148
 149 /* Use ON-Chip SRAM until RAM will be available */
 150 #define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
 151 #ifdef CONFIG_POST
 152 /* preserve space for the post_word at end of on-chip SRAM */
 153 #define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_POST_SIZE
 154 #else
 155 #define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_SIZE
 156 #endif
 157
 158 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 159 #define CONFIG_BOARD_TYPES      1       /* we use board_type */
 160
 161 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 162
 163 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
 164 #define CONFIG_SYS_MONITOR_LEN          (384 << 10)     /* 384 kB for Monitor */
 165 #define CONFIG_SYS_MALLOC_LEN           (256 << 10)     /* 256 kB for malloc() */
 166 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)       /* initial mem map for Linux */
 167
 168 /*
 169  * Flash configuration
 170  */
 171 #define CONFIG_SYS_FLASH_CFI            1
 172 #define CONFIG_FLASH_CFI_DRIVER 1
 173 #define CONFIG_SYS_FLASH_BASE           0xfc000000
 174 /* we need these despite using CFI */
 175 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max num of flash banks */
 176 #define CONFIG_SYS_MAX_FLASH_SECT       256     /* max num of sectors on one chip */
 177 #define CONFIG_SYS_FLASH_SIZE           0x02000000 /* 32 MiB */
 178
 179
 180 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 181 #define CONFIG_SYS_RAMBOOT              1
 182 #undef CONFIG_SYS_LOWBOOT
 183 #endif
 184
 185
 186 /*
 187  * Chip selects configuration
 188  */
 189 /* Boot Chipselect */
 190 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
 191 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
 192 #define CONFIG_SYS_BOOTCS_CFG           0x00087D31      /* for pci_clk = 33 MHz */
 193 /* use board_early_init_r to enable flash write in CS_BOOT */
 194 #define CONFIG_BOARD_EARLY_INIT_R
 195
 196 /* Flash memory addressing */
 197 #define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
 198 #define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
 199
 200 /* No burst, dead cycle = 1 for CS0 (Flash) */
 201 #define CONFIG_SYS_CS_BURST             0x00000000
 202 #define CONFIG_SYS_CS_DEADCYCLE 0x00000001
 203
 204 /*
 205  * SDRAM configuration
 206  * settings for k4s561632E-xx75, assuming XLB = 132 MHz
 207  */
 208 #define SDRAM_MODE      0x00CD0000      /* CASL 3, burst length 8 */
 209 #define SDRAM_CONTROL   0x514F0000
 210 #define SDRAM_CONFIG1   0xE2333900
 211 #define SDRAM_CONFIG2   0x8EE70000
 212
 213 /*
 214  * MTD configuration
 215  */
 216 #define CONFIG_CMD_MTDPARTS     1
 217 #define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
 218 #define CONFIG_FLASH_CFI_MTD
 219 #define MTDIDS_DEFAULT          "nor0=cm5200-0"
 220 #define MTDPARTS_DEFAULT        "mtdparts=cm5200-0:"                    \
 221                                         "384k(uboot),128k(env),"        \
 222                                         "128k(redund_env),128k(dtb),"   \
 223                                         "2m(kernel),27904k(rootfs),"    \
 224                                         "-(config)"
 225
 226 /*
 227  * I2C configuration
 228  */
 229 #define CONFIG_HARD_I2C         1       /* I2C with hardware support */
 230 #define CONFIG_SYS_I2C_MODULE           2       /* Select I2C module #2 */
 231 #define CONFIG_SYS_I2C_SPEED            40000   /* 40 kHz */
 232 #define CONFIG_SYS_I2C_SLAVE            0x0
 233 #define CONFIG_SYS_I2C_IO               0x38    /* PCA9554AD I2C I/O port address */
 234 #define CONFIG_SYS_I2C_EEPROM           0x53    /* I2C EEPROM device address */
 235
 236 /*
 237  * RTC configuration
 238  */
 239 #define CONFIG_RTC_MPC5200      1       /* use internal MPC5200 RTC */
 240
 241 /*
 242  * USB configuration
 243  */
 244 #define CONFIG_USB_OHCI         1
 245 #define CONFIG_USB_STORAGE      1
 246 #define CONFIG_USB_CLOCK        0x0001BBBB
 247 #define CONFIG_USB_CONFIG       0x00001000
 248 /* Partitions (for USB) */
 249 #define CONFIG_MAC_PARTITION    1
 250 #define CONFIG_DOS_PARTITION    1
 251 #define CONFIG_ISO_PARTITION    1
 252
 253 /*
 254  * Invoke our last_stage_init function - needed by fwupdate
 255  */
 256 #define CONFIG_LAST_STAGE_INIT  1
 257
 258 /*
 259  * Environment settings
 260  */
 261 #define CONFIG_ENV_IS_IN_FLASH  1
 262 #define CONFIG_ENV_SIZE         0x10000
 263 #define CONFIG_ENV_SECT_SIZE    0x20000
 264 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
 265 /* Configuration of redundant environment */
 266 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
 267 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
 268
 269 /*
 270  * Pin multiplexing configuration
 271  */
 272
 273 /*
 274  * CS1/GPIO_WKUP_6: GPIO (default)
 275  * ALTs: CAN1 on I2C1, CAN2 on TIMER0/1
 276  * IRDA/PSC6: UART
 277  * Ether: Ethernet 100Mbit with MD
 278  * PCI_DIS: PCI controller disabled
 279  * USB: USB
 280  * PSC3: SPI with UART3
 281  * PSC2: UART
 282  * PSC1: UART
 283  */
 284 #define CONFIG_SYS_GPS_PORT_CONFIG      0x10559C44
 285
 286 /*
 287  * Miscellaneous configurable options
 288  */
 289 #define CONFIG_SYS_LONGHELP             1       /* undef to save memory */
 290 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size */
 291 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 292 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 293 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size */
 294
 295 #define CONFIG_SYS_ALT_MEMTEST          1
 296 #define CONFIG_SYS_MEMTEST_START        0x00100000      /* memtest works on */
 297 #define CONFIG_SYS_MEMTEST_END          0x03f00000      /* 1 .. 63 MiB in SDRAM */
 298
 299 #define CONFIG_LOOPW            1
 300
 301 #define CONFIG_SYS_LOAD_ADDR            0x100000        /* default load address */
 302
 303 /*
 304  * Various low-level settings
 305  */
 306 #define CONFIG_SYS_HID0_INIT            HID0_ICE | HID0_ICFI
 307 #define CONFIG_SYS_HID0_FINAL           HID0_ICE
 308
 309 #define CONFIG_SYS_XLB_PIPELINING       1       /* enable transaction pipeling */
 310
 311 /*
 312  * Cache Configuration
 313  */
 314 #define CONFIG_SYS_CACHELINE_SIZE       32      /* For MPC5xxx CPUs */
 315 #ifdef CONFIG_CMD_KGDB
 316 #define CONFIG_SYS_CACHELINE_SHIFT      5       /* log base 2 of the above value */
 317 #endif
 318
 319 /*
 320  * Flat Device Tree support
 321  */
 322 #define CONFIG_OF_LIBFDT        1
 323 #define CONFIG_OF_BOARD_SETUP   1
 324 #define OF_CPU                  "PowerPC,5200@0"
 325 #define OF_SOC                  "soc5200@f0000000"
 326 #define OF_TBCLK                (bd->bi_busfreq / 4)
 327 #define OF_STDOUT_PATH          "/soc5200@f0000000/serial@2000"
 328
 329 #endif /* __CONFIG_H */