include/configs/cm5200.h

   1 /*
   2  * (C) Copyright 2003-2007
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #ifndef __CONFIG_H
  25 #define __CONFIG_H
  26
  27 /*
  28  * High Level Configuration Options
  29  */
  30 #define CONFIG_MPC5xxx          1       /* This is an MPC5xxx CPU */
  31 #define CONFIG_MPC5200          1       /* (more precisely an MPC5200 CPU) */
  32 #define CONFIG_CM5200           1       /* ... on CM5200 platform */
  33
  34 /*
  35  * Supported commands
  36  */
  37 #include <config_cmd_default.h>
  38
  39 #define CONFIG_CMD_ASKENV
  40 #define CONFIG_CMD_BSP
  41 #define CONFIG_CMD_DATE
  42 #define CONFIG_CMD_DHCP
  43 #define CONFIG_CMD_DIAG
  44 #define CONFIG_CMD_FAT
  45 #define CONFIG_CMD_I2C
  46 #define CONFIG_CMD_JFFS2
  47 #define CONFIG_CMD_MII
  48 #define CONFIG_CMD_NFS
  49 #define CONFIG_CMD_PING
  50 #define CONFIG_CMD_REGINFO
  51 #define CONFIG_CMD_SNTP
  52 #define CONFIG_CMD_USB
  53
  54 /*
  55  * Serial console configuration
  56  */
  57 #define CONFIG_PSC_CONSOLE      1       /* console is on PSC1 */
  58 #define CONFIG_BAUDRATE         57600   /* ... at 57600 bps */
  59 #define CFG_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200, 230400 }
  60 #define CONFIG_SILENT_CONSOLE   1       /* needed to silence i2c_init() */
  61
  62 /*
  63  * Ethernet configuration
  64  */
  65 #define CONFIG_MPC5xxx_FEC      1
  66 #define CONFIG_PHY_ADDR         0x00
  67 #define CONFIG_ENV_OVERWRITE    1       /* allow overwriting of ethaddr */
  68 /* use misc_init_r() to read ethaddr from I2C EEPROM (see CFG_I2C_EEPROM) */
  69 #define CONFIG_MISC_INIT_R      1
  70 #define CONFIG_MAC_OFFSET       0x35    /* MAC address offset in I2C EEPROM */
  71
  72 /*
  73  * POST support
  74  */
  75 #define CONFIG_POST             (CFG_POST_MEMORY | CFG_POST_CPU | CFG_POST_I2C)
  76 #define MPC5XXX_SRAM_POST_SIZE  (MPC5XXX_SRAM_SIZE - 4)
  77 /* List of I2C addresses to be verified by POST */
  78 #define I2C_ADDR_LIST           { CFG_I2C_SLAVE, CFG_I2C_IO, CFG_I2C_EEPROM }
  79
  80 /* display image timestamps */
  81 #define CONFIG_TIMESTAMP        1
  82
  83 /*
  84  * Autobooting
  85  */
  86 #define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds */
  87 #define CONFIG_PREBOOT  "echo;" \
  88         "echo Type \"run net_nfs_fdt\" to mount root filesystem over NFS;" \
  89         "echo"
  90 #undef CONFIG_BOOTARGS
  91
  92 /*
  93  * Default environment settings
  94  */
  95 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
  96         "netdev=eth0\0"                                                 \
  97         "netmask=255.255.0.0\0"                                         \
  98         "ipaddr=192.168.160.33\0"                                       \
  99         "serverip=192.168.1.1\0"                                        \
 100         "gatewayip=192.168.1.1\0"                                       \
 101         "console=ttyPSC0\0"                                             \
 102         "u-boot_addr=100000\0"                                          \
 103         "kernel_addr=200000\0"                                          \
 104         "kernel_addr_flash=fc0c0000\0"                                  \
 105         "fdt_addr=400000\0"                                             \
 106         "fdt_addr_flash=fc0a0000\0"                                     \
 107         "ramdisk_addr=500000\0"                                         \
 108         "rootpath=/opt/eldk-4.1/ppc_6xx\0"                              \
 109         "u-boot=/tftpboot/cm5200/u-boot.bin\0"                          \
 110         "bootfile_fdt=/tftpboot/cm5200/uImage\0"                        \
 111         "fdt_file=/tftpboot/cm5200/cm5200.dtb\0"                        \
 112         "load=tftp ${u-boot_addr} ${u-boot}\0"                          \
 113         "update=prot off fc000000 +${filesize}; "                       \
 114                 "era fc000000 +${filesize}; "                           \
 115                 "cp.b ${u-boot_addr} fc000000 ${filesize}; "            \
 116                 "prot on fc000000 +${filesize}\0"                       \
 117         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 118                 "nfsroot=${serverip}:${rootpath}\0"                     \
 119         "flashargs=setenv bootargs root=/dev/mtdblock5 rw\0"            \
 120         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
 121         "addinit=setenv bootargs ${bootargs} init=/linuxrc\0"           \
 122         "addcons=setenv bootargs ${bootargs} "                          \
 123                 "console=${console},${baudrate}\0"                      \
 124         "addip=setenv bootargs ${bootargs} "                            \
 125                 "ip=${ipaddr}:${serverip}:${gatewayip}:"                \
 126                 "${netmask}:${hostname}:${netdev}:off panic=1\0"        \
 127         "flash_flash=run flashargs addinit addip addcons;"              \
 128                 "bootm ${kernel_addr_flash} - ${fdt_addr_flash}\0"      \
 129         "net_nfs_fdt=tftp ${kernel_addr} ${bootfile_fdt}; "             \
 130                 "tftp ${fdt_addr} ${fdt_file}; run nfsargs addip "      \
 131                 "addcons; bootm ${kernel_addr} - ${fdt_addr}\0"         \
 132         ""
 133 #define CONFIG_BOOTCOMMAND      "run flash_flash"
 134
 135 /*
 136  * Low level configuration
 137  */
 138
 139 /*
 140  * Clock configuration
 141  */
 142 #define CFG_MPC5XXX_CLKIN       33000000        /* SYS_XTAL_IN = 33MHz */
 143 #define CFG_IPBCLK_EQUALS_XLBCLK        1       /* IPB = 133MHz */
 144
 145 /*
 146  * Memory map
 147  */
 148 #define CFG_MBAR                0xF0000000
 149 #define CFG_SDRAM_BASE          0x00000000
 150 #define CFG_DEFAULT_MBAR        0x80000000
 151
 152 #define CFG_LOWBOOT             1
 153
 154 /* Use ON-Chip SRAM until RAM will be available */
 155 #define CFG_INIT_RAM_ADDR       MPC5XXX_SRAM
 156 #ifdef CONFIG_POST
 157 /* preserve space for the post_word at end of on-chip SRAM */
 158 #define CFG_INIT_RAM_END        MPC5XXX_SRAM_POST_SIZE
 159 #else
 160 #define CFG_INIT_RAM_END        MPC5XXX_SRAM_SIZE
 161 #endif
 162
 163 #define CFG_GBL_DATA_SIZE       128     /* size in bytes for initial data */
 164 #define CFG_GBL_DATA_OFFSET     (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 165 #define CONFIG_BOARD_TYPES      1       /* we use board_type */
 166
 167 #define CFG_INIT_SP_OFFSET      CFG_GBL_DATA_OFFSET
 168
 169 #define CFG_MONITOR_BASE        TEXT_BASE
 170 #define CFG_MONITOR_LEN         (384 << 10)     /* 384 kB for Monitor */
 171 #define CFG_MALLOC_LEN          (256 << 10)     /* 256 kB for malloc() */
 172 #define CFG_BOOTMAPSZ           (8 << 20)       /* initial mem map for Linux */
 173
 174 /*
 175  * Flash configuration
 176  */
 177 #define CFG_FLASH_CFI           1
 178 #define CFG_FLASH_CFI_DRIVER    1
 179 #define CFG_FLASH_BASE          0xfc000000
 180 /* we need these despite using CFI */
 181 #define CFG_MAX_FLASH_BANKS     1       /* max num of flash banks */
 182 #define CFG_MAX_FLASH_SECT      256     /* max num of sectors on one chip */
 183 #define CFG_FLASH_SIZE          0x02000000 /* 32 MiB */
 184
 185
 186 #if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
 187 #define CFG_RAMBOOT             1
 188 #undef CFG_LOWBOOT
 189 #endif
 190
 191
 192 /*
 193  * Chip selects configuration
 194  */
 195 /* Boot Chipselect */
 196 #define CFG_BOOTCS_START        CFG_FLASH_BASE
 197 #define CFG_BOOTCS_SIZE         CFG_FLASH_SIZE
 198 #define CFG_BOOTCS_CFG          0x00087D31      /* for pci_clk = 33 MHz */
 199 /* use board_early_init_r to enable flash write in CS_BOOT */
 200 #define CONFIG_BOARD_EARLY_INIT_R
 201
 202 /* Flash memory addressing */
 203 #define CFG_CS0_START           CFG_FLASH_BASE
 204 #define CFG_CS0_SIZE            CFG_FLASH_SIZE
 205
 206 /* No burst, dead cycle = 1 for CS0 (Flash) */
 207 #define CFG_CS_BURST            0x00000000
 208 #define CFG_CS_DEADCYCLE        0x00000001
 209
 210 /*
 211  * SDRAM configuration
 212  * settings for k4s561632E-xx75, assuming XLB = 132 MHz
 213  */
 214 #define SDRAM_MODE      0x00CD0000      /* CASL 3, burst length 8 */
 215 #define SDRAM_CONTROL   0x514F0000
 216 #define SDRAM_CONFIG1   0xE2333900
 217 #define SDRAM_CONFIG2   0x8EE70000
 218
 219 /*
 220  * MTD configuration
 221  */
 222 #define CONFIG_JFFS2_CMDLINE    1
 223 #define MTDIDS_DEFAULT          "nor0=cm5200-0"
 224 #define MTDPARTS_DEFAULT        "mtdparts=cm5200-0:"                    \
 225                                         "384k(uboot),128k(env),"        \
 226                                         "128k(redund_env),128k(dtb),"   \
 227                                         "2m(kernel),27904k(rootfs),"    \
 228                                         "-(config)"
 229
 230 /*
 231  * I2C configuration
 232  */
 233 #define CONFIG_HARD_I2C         1       /* I2C with hardware support */
 234 #define CFG_I2C_MODULE          2       /* Select I2C module #2 */
 235 #define CFG_I2C_SPEED           40000   /* 40 kHz */
 236 #define CFG_I2C_SLAVE           0x0
 237 #define CFG_I2C_IO              0x38    /* PCA9554AD I2C I/O port address */
 238 #define CFG_I2C_EEPROM          0x53    /* I2C EEPROM device address */
 239
 240 /*
 241  * RTC configuration
 242  */
 243 #define CONFIG_RTC_MPC5200      1       /* use internal MPC5200 RTC */
 244
 245 /*
 246  * USB configuration
 247  */
 248 #define CONFIG_USB_OHCI         1
 249 #define CONFIG_USB_STORAGE      1
 250 #define CONFIG_USB_CLOCK        0x0001BBBB
 251 #define CONFIG_USB_CONFIG       0x00001000
 252 /* Partitions (for USB) */
 253 #define CONFIG_MAC_PARTITION    1
 254 #define CONFIG_DOS_PARTITION    1
 255 #define CONFIG_ISO_PARTITION    1
 256
 257 /*
 258  * Invoke our last_stage_init function - needed by fwupdate
 259  */
 260 #define CONFIG_LAST_STAGE_INIT  1
 261
 262 /*
 263  * Environment settings
 264  */
 265 #define CFG_ENV_IS_IN_FLASH     1
 266 #define CFG_ENV_SIZE            0x10000
 267 #define CFG_ENV_SECT_SIZE       0x20000
 268 #define CFG_ENV_ADDR            (CFG_FLASH_BASE + CFG_MONITOR_LEN)
 269 /* Configuration of redundant environment */
 270 #define CFG_ENV_ADDR_REDUND     (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
 271 #define CFG_ENV_SIZE_REDUND     (CFG_ENV_SIZE)
 272
 273 /*
 274  * Pin multiplexing configuration
 275  */
 276
 277 /*
 278  * CS1/GPIO_WKUP_6: GPIO (default)
 279  * ALTs: CAN1 on I2C1, CAN2 on TIMER0/1
 280  * IRDA/PSC6: UART
 281  * Ether: Ethernet 100Mbit with MD
 282  * PCI_DIS: PCI controller disabled
 283  * USB: USB
 284  * PSC3: SPI with UART3
 285  * PSC2: UART
 286  * PSC1: UART
 287  */
 288 #define CFG_GPS_PORT_CONFIG     0x10559C44
 289
 290 /*
 291  * Miscellaneous configurable options
 292  */
 293 #define CFG_LONGHELP            1       /* undef to save memory */
 294 #define CFG_PROMPT              "=> "   /* Monitor Command Prompt */
 295 #define CFG_CBSIZE              1024    /* Console I/O Buffer Size */
 296 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
 297 #define CFG_MAXARGS             16      /* max number of command args */
 298 #define CFG_BARGSIZE            CFG_CBSIZE      /* Boot Argument Buffer Size */
 299
 300 #define CFG_ALT_MEMTEST         1
 301 #define CFG_MEMTEST_START       0x00100000      /* memtest works on */
 302 #define CFG_MEMTEST_END         0x03f00000      /* 1 .. 63 MiB in SDRAM */
 303
 304 #define CONFIG_LOOPW            1
 305
 306 #define CFG_LOAD_ADDR           0x100000        /* default load address */
 307 #define CFG_HZ                  1000    /* decrementer freq: 1 ms ticks */
 308
 309 /*
 310  * Various low-level settings
 311  */
 312 #define CFG_HID0_INIT           HID0_ICE | HID0_ICFI
 313 #define CFG_HID0_FINAL          HID0_ICE
 314
 315 #define BOOTFLAG_COLD           0x01    /* Normal Power-On: Boot from FLASH */
 316 #define BOOTFLAG_WARM           0x02    /* Software reboot */
 317
 318 #define CFG_XLB_PIPELINING      1       /* enable transaction pipeling */
 319
 320 /*
 321  * Cache Configuration
 322  */
 323 #define CFG_CACHELINE_SIZE      32      /* For MPC5xxx CPUs */
 324 #ifdef CONFIG_CMD_KGDB
 325 #define CFG_CACHELINE_SHIFT     5       /* log base 2 of the above value */
 326 #endif
 327
 328 /*
 329  * Flat Device Tree support
 330  */
 331 #define CONFIG_OF_LIBFDT        1
 332 #define CONFIG_OF_BOARD_SETUP   1
 333 #define OF_CPU                  "PowerPC,5200@0"
 334 #define OF_SOC                  "soc5200@f0000000"
 335 #define OF_TBCLK                (bd->bi_busfreq / 4)
 336 #define OF_STDOUT_PATH          "/soc5200@f0000000/serial@2000"
 337
 338 #endif /* __CONFIG_H */