include/configs/cm_t3517.h

   1 /*
   2  * (C) Copyright 2013 CompuLab, Ltd.
   3  * Author: Igor Grinberg <grinberg@compulab.co.il>
   4  *
   5  * Configuration settings for the CompuLab CM-T3517 board
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #ifndef __CONFIG_H
  11 #define __CONFIG_H
  12
  13 /*
  14  * High Level Configuration Options
  15  */
  16 #define CONFIG_OMAP     /* in a TI OMAP core */
  17 #define CONFIG_CM_T3517 /* working with CM-T3517 */
  18 /* Common ARM Erratas */
  19 #define CONFIG_ARM_ERRATA_454179
  20 #define CONFIG_ARM_ERRATA_430973
  21 #define CONFIG_ARM_ERRATA_621766
  22
  23 #define CONFIG_SYS_TEXT_BASE    0x80008000
  24
  25 /*
  26  * This is needed for the DMA stuff.
  27  * Although the default iss 64, we still define it
  28  * to be on the safe side once the default is changed.
  29  */
  30
  31 #define CONFIG_EMIF4    /* The chip has EMIF4 controller */
  32
  33 #include <asm/arch/cpu.h>               /* get chip and board defs */
  34 #include <asm/arch/omap.h>
  35
  36 #define CONFIG_MACH_TYPE                MACH_TYPE_CM_T3517
  37
  38 /* Clock Defines */
  39 #define V_OSCK                  26000000        /* Clock output from T2 */
  40 #define V_SCLK                  (V_OSCK >> 1)
  41
  42 #define CONFIG_MISC_INIT_R
  43
  44 /*
  45  * The early kernel mapping on ARM currently only maps from the base of DRAM
  46  * to the end of the kernel image.  The kernel is loaded at DRAM base + 0x8000.
  47  * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
  48  * so that leaves DRAM base to DRAM base + 0x4000 available.
  49  */
  50 #define CONFIG_SYS_BOOTMAPSZ            0x4000
  51
  52 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
  53 #define CONFIG_SETUP_MEMORY_TAGS
  54 #define CONFIG_INITRD_TAG
  55 #define CONFIG_REVISION_TAG
  56 #define CONFIG_SERIAL_TAG
  57
  58 /*
  59  * Size of malloc() pool
  60  */
  61 #define CONFIG_ENV_SIZE         (128 << 10)     /* 128 KiB */
  62 #define CONFIG_SYS_MALLOC_LEN   (CONFIG_ENV_SIZE + (128 << 10))
  63
  64 /*
  65  * Hardware drivers
  66  */
  67
  68 /*
  69  * NS16550 Configuration
  70  */
  71 #define CONFIG_SYS_NS16550_SERIAL
  72 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  73 #define CONFIG_SYS_NS16550_CLK          48000000        /* 48MHz (APLL96/2) */
  74
  75 /*
  76  * select serial console configuration
  77  */
  78 #define CONFIG_CONS_INDEX               3
  79 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  80 #define CONFIG_SERIAL3                  3       /* UART3 */
  81
  82 /* allow to overwrite serial and ethaddr */
  83 #define CONFIG_ENV_OVERWRITE
  84 #define CONFIG_BAUDRATE                 115200
  85 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  86                                         115200}
  87
  88 #define CONFIG_OMAP_GPIO
  89
  90 #define CONFIG_GENERIC_MMC
  91 #define CONFIG_DOS_PARTITION
  92
  93 /* USB */
  94 #define CONFIG_USB_MUSB_AM35X
  95
  96 #ifndef CONFIG_USB_MUSB_AM35X
  97 #define CONFIG_USB_OMAP3
  98 #define CONFIG_USB_EHCI
  99 #define CONFIG_USB_EHCI_OMAP
 100 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146
 101 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147
 102 #else /* !CONFIG_USB_MUSB_AM35X */
 103 #define CONFIG_USB_MUSB_PIO_ONLY
 104 #endif /* CONFIG_USB_MUSB_AM35X */
 105
 106 /* commands to include */
 107 #define CONFIG_CMD_MTDPARTS     /* Enable MTD parts commands */
 108 #define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
 109 #define CONFIG_MTD_PARTITIONS
 110 #define MTDIDS_DEFAULT          "nand0=nand"
 111 #define MTDPARTS_DEFAULT        "mtdparts=nand:512k(x-loader),"\
 112                                 "1920k(u-boot),256k(u-boot-env),"\
 113                                 "4m(kernel),-(fs)"
 114
 115 #define CONFIG_CMD_NAND         /* NAND support                 */
 116
 117 #define CONFIG_SYS_NO_FLASH
 118 #define CONFIG_SYS_I2C
 119 #define CONFIG_SYS_OMAP24_I2C_SPEED     400000
 120 #define CONFIG_SYS_OMAP24_I2C_SLAVE     1
 121 #define CONFIG_SYS_I2C_OMAP34XX
 122 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50
 123 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1
 124 #define CONFIG_SYS_I2C_EEPROM_BUS       0
 125 #define CONFIG_I2C_MULTI_BUS
 126
 127 /*
 128  * Board NAND Info.
 129  */
 130 #define CONFIG_NAND_OMAP_GPMC
 131 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 132                                                         /* to access nand */
 133 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 134                                                         /* to access nand at */
 135                                                         /* CS0 */
 136 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of NAND */
 137                                                         /* devices */
 138
 139 /* Environment information */
 140 #define CONFIG_EXTRA_ENV_SETTINGS \
 141         "loadaddr=0x82000000\0" \
 142         "baudrate=115200\0" \
 143         "console=ttyO2,115200n8\0" \
 144         "netretry=yes\0" \
 145         "mpurate=auto\0" \
 146         "vram=12M\0" \
 147         "dvimode=1024x768MR-16@60\0" \
 148         "defaultdisplay=dvi\0" \
 149         "mmcdev=0\0" \
 150         "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
 151         "mmcrootfstype=ext4\0" \
 152         "nandroot=/dev/mtdblock4 rw\0" \
 153         "nandrootfstype=ubifs\0" \
 154         "mmcargs=setenv bootargs console=${console} " \
 155                 "mpurate=${mpurate} " \
 156                 "vram=${vram} " \
 157                 "omapfb.mode=dvi:${dvimode} " \
 158                 "omapdss.def_disp=${defaultdisplay} " \
 159                 "root=${mmcroot} " \
 160                 "rootfstype=${mmcrootfstype}\0" \
 161         "nandargs=setenv bootargs console=${console} " \
 162                 "mpurate=${mpurate} " \
 163                 "vram=${vram} " \
 164                 "omapfb.mode=dvi:${dvimode} " \
 165                 "omapdss.def_disp=${defaultdisplay} " \
 166                 "root=${nandroot} " \
 167                 "rootfstype=${nandrootfstype}\0" \
 168         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
 169         "bootscript=echo Running bootscript from mmc ...; " \
 170                 "source ${loadaddr}\0" \
 171         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 172         "mmcboot=echo Booting from mmc ...; " \
 173                 "run mmcargs; " \
 174                 "bootm ${loadaddr}\0" \
 175         "nandboot=echo Booting from nand ...; " \
 176                 "run nandargs; " \
 177                 "nand read ${loadaddr} 2a0000 400000; " \
 178                 "bootm ${loadaddr}\0" \
 179
 180 #define CONFIG_BOOTCOMMAND \
 181         "mmc dev ${mmcdev}; if mmc rescan; then " \
 182                 "if run loadbootscript; then " \
 183                         "run bootscript; " \
 184                 "else " \
 185                         "if run loaduimage; then " \
 186                                 "run mmcboot; " \
 187                         "else run nandboot; " \
 188                         "fi; " \
 189                 "fi; " \
 190         "else run nandboot; fi"
 191
 192 /*
 193  * Miscellaneous configurable options
 194  */
 195 #define CONFIG_AUTO_COMPLETE
 196 #define CONFIG_CMDLINE_EDITING
 197 #define CONFIG_TIMESTAMP
 198 #define CONFIG_SYS_AUTOLOAD             "no"
 199 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 200 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 201 /* Print Buffer Size */
 202 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 203                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 204 #define CONFIG_SYS_MAXARGS              32      /* max number of command args */
 205 /* Boot Argument Buffer Size */
 206 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 207
 208 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0 + 0x02000000)
 209
 210 /*
 211  * AM3517 has 12 GP timers, they can be driven by the system clock
 212  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 213  * This rate is divided by a local divisor.
 214  */
 215 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
 216 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 217 #define CONFIG_SYS_HZ                   1000
 218
 219 /*-----------------------------------------------------------------------
 220  * Physical Memory Map
 221  */
 222 #define CONFIG_NR_DRAM_BANKS    1       /* CM-T3517 DRAM is only on CS0 */
 223 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 224 #define CONFIG_SYS_CS0_SIZE             (256 << 20)
 225
 226 /*-----------------------------------------------------------------------
 227  * FLASH and environment organization
 228  */
 229
 230 /* **** PISMO SUPPORT *** */
 231 /* Monitor at start of flash */
 232 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 233 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 234
 235 #define CONFIG_ENV_IS_IN_NAND
 236 #define SMNAND_ENV_OFFSET               0x260000 /* environment starts here */
 237 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 238 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 239
 240 #if defined(CONFIG_CMD_NET)
 241 #define CONFIG_DRIVER_TI_EMAC
 242 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
 243 #define CONFIG_MII
 244 #define CONFIG_SMC911X
 245 #define CONFIG_SMC911X_32_BIT
 246 #define CONFIG_SMC911X_BASE     (0x2C000000 + (16 << 20))
 247 #define CONFIG_ARP_TIMEOUT              200UL
 248 #define CONFIG_NET_RETRY_COUNT          5
 249 #endif /* CONFIG_CMD_NET */
 250
 251 /* additions for new relocation code, must be added to all boards */
 252 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 253 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 254 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 255 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR +     \
 256                                          CONFIG_SYS_INIT_RAM_SIZE -     \
 257                                          GENERATED_GBL_DATA_SIZE)
 258
 259 /* Status LED */
 260 #define CONFIG_STATUS_LED               /* Status LED enabled */
 261 #define CONFIG_BOARD_SPECIFIC_LED
 262 #define CONFIG_GPIO_LED
 263 #define GREEN_LED_GPIO                  186 /* CM-T3517 Green LED is GPIO186 */
 264 #define GREEN_LED_DEV                   0
 265 #define STATUS_LED_BIT                  GREEN_LED_GPIO
 266 #define STATUS_LED_STATE                STATUS_LED_ON
 267 #define STATUS_LED_PERIOD               (CONFIG_SYS_HZ / 2)
 268 #define STATUS_LED_BOOT                 GREEN_LED_DEV
 269
 270 /* GPIO banks */
 271 #ifdef CONFIG_STATUS_LED
 272 #define CONFIG_OMAP3_GPIO_6     /* GPIO186 is in GPIO bank 6  */
 273 #endif
 274
 275 /* Display Configuration */
 276 #define CONFIG_OMAP3_GPIO_2
 277 #define CONFIG_OMAP3_GPIO_5
 278 #define CONFIG_VIDEO_OMAP3
 279 #define LCD_BPP         LCD_COLOR16
 280
 281 #define CONFIG_SPLASH_SCREEN
 282 #define CONFIG_SPLASHIMAGE_GUARD
 283 #define CONFIG_CMD_BMP
 284 #define CONFIG_BMP_16BPP
 285 #define CONFIG_SCF0403_LCD
 286
 287 #define CONFIG_OMAP3_SPI
 288
 289 /* EEPROM */
 290 #define CONFIG_CMD_EEPROM
 291 #define CONFIG_ENV_EEPROM_IS_ON_I2C
 292 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
 293 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       4
 294 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   5
 295 #define CONFIG_SYS_EEPROM_SIZE                  256
 296
 297 #define CONFIG_CMD_EEPROM_LAYOUT
 298 #define CONFIG_EEPROM_LAYOUT_HELP_STRING "v1, v2, v3"
 299
 300 #endif /* __CONFIG_H */