include/configs/corvus.h

   1 /*
   2  * Common board functions for siemens AT91SAM9G45 based boards
   3  * (C) Copyright 2013 Siemens AG
   4  *
   5  * Based on:
   6  * U-Boot file: include/configs/at91sam9m10g45ek.h
   7  * (C) Copyright 2007-2008
   8  * Stelian Pop <stelian@popies.net>
   9  * Lead Tech Design <www.leadtechdesign.com>
  10  *
  11  * SPDX-License-Identifier:     GPL-2.0+
  12  */
  13
  14 #ifndef __CONFIG_H
  15 #define __CONFIG_H
  16
  17 #include <asm/hardware.h>
  18
  19 #define MACH_TYPE_CORVUS               2066
  20
  21 #define CONFIG_SYS_GENERIC_BOARD
  22 /*
  23  * Warning: changing CONFIG_SYS_TEXT_BASE requires
  24  * adapting the initial boot program.
  25  * Since the linker has to swallow that define, we must use a pure
  26  * hex number here!
  27  */
  28
  29 #define CONFIG_SYS_TEXT_BASE  0x72000000
  30
  31 #define CONFIG_ATMEL_LEGACY             /* required until (g)pio is fixed */
  32
  33 /* ARM asynchronous clock */
  34 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768
  35 #define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
  36
  37 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs      */
  38 #define CONFIG_SETUP_MEMORY_TAGS
  39 #define CONFIG_INITRD_TAG
  40 #define CONFIG_SKIP_LOWLEVEL_INIT
  41 #define CONFIG_BOARD_EARLY_INIT_F
  42 #define CONFIG_DISPLAY_CPUINFO
  43
  44 #define CONFIG_CMD_BOOTZ
  45 #define CONFIG_OF_LIBFDT
  46
  47 /* general purpose I/O */
  48 #define CONFIG_ATMEL_LEGACY             /* required until (g)pio is fixed */
  49 #define CONFIG_AT91_GPIO
  50 #define CONFIG_AT91_GPIO_PULLUP 1       /* keep pullups on peripheral pins */
  51
  52 /* serial console */
  53 #define CONFIG_ATMEL_USART
  54 #define CONFIG_USART_BASE               ATMEL_BASE_DBGU
  55 #define CONFIG_USART_ID                 ATMEL_ID_SYS
  56
  57 /* LED */
  58 #define CONFIG_AT91_LED
  59 #define CONFIG_RED_LED          AT91_PIN_PD31   /* this is the user1 led */
  60 #define CONFIG_GREEN_LED        AT91_PIN_PD0    /* this is the user2 led */
  61
  62 #define CONFIG_BOOTDELAY        3
  63
  64 /*
  65  * BOOTP options
  66  */
  67 #define CONFIG_BOOTP_BOOTFILESIZE
  68 #define CONFIG_BOOTP_BOOTPATH
  69 #define CONFIG_BOOTP_GATEWAY
  70 #define CONFIG_BOOTP_HOSTNAME
  71
  72 /*
  73  * Command line configuration.
  74  */
  75 #include <config_cmd_default.h>
  76 #undef CONFIG_CMD_BDI
  77 #undef CONFIG_CMD_FPGA
  78 #undef CONFIG_CMD_IMI
  79 #undef CONFIG_CMD_IMLS
  80 #undef CONFIG_CMD_LOADS
  81
  82 #define CONFIG_CMD_PING
  83 #define CONFIG_CMD_DHCP
  84 #define CONFIG_CMD_NAND
  85 #define CONFIG_CMD_USB
  86
  87 /* SDRAM */
  88 #define CONFIG_NR_DRAM_BANKS            1
  89 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_CS6
  90 #define CONFIG_SYS_SDRAM_SIZE           0x08000000
  91
  92 #define CONFIG_SYS_INIT_SP_ADDR \
  93         (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
  94
  95 /* No NOR flash */
  96 #define CONFIG_SYS_NO_FLASH
  97
  98 /* NAND flash */
  99 #ifdef CONFIG_CMD_NAND
 100 #define CONFIG_NAND_ATMEL
 101 #define CONFIG_SYS_MAX_NAND_DEVICE              1
 102 #define CONFIG_SYS_NAND_BASE                    ATMEL_BASE_CS3
 103 #define CONFIG_SYS_NAND_DBW_8
 104 /* our ALE is AD21 */
 105 #define CONFIG_SYS_NAND_MASK_ALE                (1 << 21)
 106 /* our CLE is AD22 */
 107 #define CONFIG_SYS_NAND_MASK_CLE                (1 << 22)
 108 #define CONFIG_SYS_NAND_ENABLE_PIN              AT91_PIN_PC14
 109 #endif
 110
 111 /* Ethernet */
 112 #define CONFIG_MACB
 113 #define CONFIG_RMII
 114 #define CONFIG_NET_RETRY_COUNT          20
 115 #define CONFIG_AT91_WANTS_COMMON_PHY
 116
 117 /* USB */
 118 #define CONFIG_USB_EHCI
 119 #define CONFIG_USB_EHCI_ATMEL
 120 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS      2
 121 #define CONFIG_DOS_PARTITION
 122 #define CONFIG_USB_STORAGE
 123
 124 #define CONFIG_SYS_LOAD_ADDR            0x72000000      /* load address */
 125
 126 /* bootstrap + u-boot + env in nandflash */
 127 #define CONFIG_ENV_IS_IN_NAND
 128 #define CONFIG_ENV_OFFSET               0x100000
 129 #define CONFIG_ENV_OFFSET_REDUND        0x180000
 130 #define CONFIG_ENV_SIZE                 0x20000
 131
 132 #define CONFIG_BOOTCOMMAND                                              \
 133         "nand read 0x70000000 0x200000 0x300000;"                       \
 134         "bootm 0x70000000"
 135 #define CONFIG_BOOTARGS                                                 \
 136         "console=ttyS0,115200 earlyprintk "                             \
 137         "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"          \
 138         "256k(env),256k(env_redundant),256k(spare),"                    \
 139         "512k(dtb),6M(kernel)ro,-(rootfs) "                             \
 140         "root=/dev/mtdblock7 rw rootfstype=jffs2"
 141
 142 #define CONFIG_BAUDRATE                 115200
 143
 144 #define CONFIG_SYS_PROMPT               "U-Boot> "
 145 #define CONFIG_SYS_CBSIZE               256
 146 #define CONFIG_SYS_MAXARGS              16
 147 #define CONFIG_SYS_PBSIZE       (CONFIG_SYS_CBSIZE +    \
 148                                  sizeof(CONFIG_SYS_PROMPT) + 16)
 149 #define CONFIG_SYS_LONGHELP
 150 #define CONFIG_CMDLINE_EDITING
 151 #define CONFIG_AUTO_COMPLETE
 152 #define CONFIG_SYS_HUSH_PARSER
 153
 154 /*
 155  * Size of malloc() pool
 156  */
 157 #define CONFIG_SYS_MALLOC_LEN   ROUND(3 * CONFIG_ENV_SIZE + \
 158                                 128*1024, 0x1000)
 159 /* Defines for SPL */
 160 #define CONFIG_SPL_FRAMEWORK
 161 #define CONFIG_SPL_TEXT_BASE            0x300000
 162 #define CONFIG_SPL_MAX_SIZE             (12 * 1024)
 163 #define CONFIG_SPL_STACK                (16 * 1024)
 164
 165 #define CONFIG_SPL_BSS_START_ADDR       CONFIG_SPL_MAX_SIZE
 166 #define CONFIG_SPL_BSS_MAX_SIZE         (2 * 1024)
 167
 168 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 169 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 170 #define CONFIG_SPL_SERIAL_SUPPORT
 171
 172 #define CONFIG_SPL_BOARD_INIT
 173 #define CONFIG_SPL_GPIO_SUPPORT
 174 #define CONFIG_SYS_NAND_ENABLE_PIN_SPL  (2*32 + 14)
 175 #define CONFIG_SPL_NAND_SUPPORT
 176 #define CONFIG_SPL_NAND_DRIVERS
 177 #define CONFIG_SPL_NAND_BASE
 178 #define CONFIG_SPL_NAND_ECC
 179 #define CONFIG_SPL_NAND_RAW_ONLY
 180 #define CONFIG_SPL_NAND_SOFTECC
 181 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x20000
 182 #define CONFIG_SYS_NAND_U_BOOT_SIZE     0x80000
 183 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 184 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
 185 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 186
 187 #define CONFIG_SYS_NAND_SIZE            (256*1024*1024)
 188 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 189 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
 190 #define CONFIG_SYS_NAND_PAGE_COUNT      (CONFIG_SYS_NAND_BLOCK_SIZE / \
 191                                          CONFIG_SYS_NAND_PAGE_SIZE)
 192 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
 193 #define CONFIG_SYS_NAND_ECCSIZE         256
 194 #define CONFIG_SYS_NAND_ECCBYTES        3
 195 #define CONFIG_SYS_NAND_OOBSIZE         64
 196 #define CONFIG_SYS_NAND_ECCPOS          { 40, 41, 42, 43, 44, 45, 46, 47, \
 197                                           48, 49, 50, 51, 52, 53, 54, 55, \
 198                                           56, 57, 58, 59, 60, 61, 62, 63, }
 199
 200 #define CONFIG_SPL_ATMEL_SIZE
 201 #define CONFIG_SYS_MASTER_CLOCK         132096000
 202 #define AT91_PLL_LOCK_TIMEOUT           1000000
 203 #define CONFIG_SYS_AT91_PLLA            0x20c73f03
 204 #define CONFIG_SYS_MCKR                 0x1301
 205 #define CONFIG_SYS_MCKR_CSS             0x1302
 206
 207 #define ATMEL_BASE_MPDDRC               ATMEL_BASE_DDRSDRC0
 208
 209 #endif