include/configs/cpuat91.h

   1 /*
   2  * CPUAT91 by (C) Copyright 2006-2010 Eric Benard
   3  * eric@eukrea.com
   4  *
   5  * Configuration settings for the CPUAT91 board.
   6  *
   7  * See file CREDITS for list of people who contributed to this
   8  * project.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License as
  12  * published by the Free Software Foundation; either version 2 of
  13  * the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23  * MA 02111-1307 USA
  24  */
  25
  26 #ifndef _CONFIG_CPUAT91_H
  27 #define _CONFIG_CPUAT91_H
  28
  29 #ifdef CONFIG_CPUAT91_RAM
  30 #define CONFIG_SKIP_LOWLEVEL_INIT       1
  31 #define CONFIG_SKIP_RELOCATE_UBOOT      1
  32 #else
  33 #define CONFIG_BOOTDELAY                1
  34 #endif
  35
  36 #define AT91C_MAIN_CLOCK                179712000
  37 #define AT91C_MASTER_CLOCK              59904000
  38
  39 #define AT91_SLOW_CLOCK                 32768
  40
  41 #define CONFIG_ARM920T                  1
  42 #define CONFIG_AT91RM9200               1
  43 #define CONFIG_CPUAT91                  1
  44
  45 #undef CONFIG_USE_IRQ
  46 #define USE_920T_MMU                    1
  47
  48 #define CONFIG_CMDLINE_TAG              1
  49 #define CONFIG_SETUP_MEMORY_TAGS        1
  50 #define CONFIG_INITRD_TAG               1
  51
  52 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
  53 #define CONFIG_SYS_USE_MAIN_OSCILLATOR  1
  54 /* flash */
  55 #define CONFIG_SYS_MC_PUIA_VAL  0x00000000
  56 #define CONFIG_SYS_MC_PUP_VAL   0x00000000
  57 #define CONFIG_SYS_MC_PUER_VAL  0x00000000
  58 #define CONFIG_SYS_MC_ASR_VAL   0x00000000
  59 #define CONFIG_SYS_MC_AASR_VAL  0x00000000
  60 #define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
  61 #define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
  62
  63 /* clocks */
  64 #define CONFIG_SYS_PLLAR_VAL    0x20263E04 /* 179.712000 MHz for PCK */
  65 #define CONFIG_SYS_PLLBR_VAL    0x10483E0E /* 48.054857 MHz for USB */
  66 #define CONFIG_SYS_MCKR_VAL     0x00000202 /* PCK/3 = MCK Master Clock */
  67
  68 /* sdram */
  69 #define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as D16/D31 */
  70 #define CONFIG_SYS_PIOC_BSR_VAL 0x00000000
  71 #define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000
  72 #define CONFIG_SYS_EBI_CSA_VAL  0x00000002 /* CS1=SDRAM */
  73 #define CONFIG_SYS_SDRC_CR_VAL  0x2188C155 /* set up the SDRAM */
  74 #define CONFIG_SYS_SDRAM        0x20000000 /* address of the SDRAM */
  75 #define CONFIG_SYS_SDRAM1       0x20000080 /* address of the SDRAM */
  76 #define CONFIG_SYS_SDRAM_VAL    0x00000000 /* value written to SDRAM */
  77 #define CONFIG_SYS_SDRC_MR_VAL  0x00000002 /* Precharge All */
  78 #define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */
  79 #define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
  80 #define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */
  81 #define CONFIG_SYS_SDRC_TR_VAL  0x000002E0 /* Write refresh rate */
  82 #endif  /* CONFIG_SKIP_LOWLEVEL_INIT */
  83
  84 /* define one of these to choose the DBGU, USART0 or USART1 as console */
  85 #define CONFIG_AT91RM9200_USART         1
  86 #define CONFIG_DBGU                     1
  87 #undef CONFIG_USART0
  88 #undef CONFIG_USART1
  89
  90 #undef CONFIG_HARD_I2C
  91 #define CONFIG_SOFT_I2C                 1
  92 #define AT91_PIN_SDA                    (1<<25)
  93 #define AT91_PIN_SCL                    (1<<26)
  94
  95 #define CONFIG_SYS_I2C_INIT_BOARD       1
  96 #define CONFIG_SYS_I2C_SPEED            50000
  97 #define CONFIG_SYS_I2C_SLAVE            0
  98
  99 #define I2C_INIT        i2c_init_board();
 100 #define I2C_ACTIVE      writel(AT91_PMX_AA_TWD, &pio->pioa.mddr);
 101 #define I2C_TRISTATE    writel(AT91_PMX_AA_TWD, &pio->pioa.mder);
 102 #define I2C_READ        ((readl(&pio->pioa.pdsr) & AT91_PMX_AA_TWD) != 0)
 103 #define I2C_SDA(bit)                                            \
 104         if (bit)                                                \
 105                 writel(AT91_PMX_AA_TWD, &pio->pioa.sodr);       \
 106         else                                                    \
 107                 writel(AT91_PMX_AA_TWD, &pio->pioa.codr);
 108 #define I2C_SCL(bit)                                            \
 109         if (bit)                                                \
 110                 writel(AT91_PMX_AA_TWCK, &pio->pioa.sodr);      \
 111         else                                                    \
 112                 writel(AT91_PMX_AA_TWCK, &pio->pioa.codr);
 113
 114 #define I2C_DELAY       udelay(2500000/CONFIG_SYS_I2C_SPEED)
 115
 116 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x54
 117 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
 118 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW     1
 119 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10
 120
 121 #define CONFIG_BOOTP_BOOTFILESIZE       1
 122 #define CONFIG_BOOTP_BOOTPATH           1
 123 #define CONFIG_BOOTP_GATEWAY            1
 124 #define CONFIG_BOOTP_HOSTNAME           1
 125
 126 #include <config_cmd_default.h>
 127
 128 #define CONFIG_CMD_DHCP                 1
 129 #define CONFIG_CMD_PING                 1
 130 #define CONFIG_CMD_MII                  1
 131 #define CONFIG_CMD_CACHE                1
 132 #undef CONFIG_CMD_USB
 133 #undef CONFIG_CMD_FPGA
 134 #undef CONFIG_CMD_IMI
 135 #undef CONFIG_CMD_LOADS
 136 #undef CONFIG_CMD_NFS
 137
 138 #define CONFIG_CMD_EEPROM               1
 139 #define CONFIG_CMD_I2C                  1
 140
 141 #define CONFIG_NR_DRAM_BANKS                    1
 142 #define PHYS_SDRAM                              0x20000000
 143 #define PHYS_SDRAM_SIZE                         0x02000000
 144
 145 #define CONFIG_SYS_MEMTEST_START                PHYS_SDRAM
 146 #define CONFIG_SYS_MEMTEST_END                  \
 147         (CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 512 * 1024)
 148
 149 #define CONFIG_NET_MULTI                1
 150 #define CONFIG_DRIVER_AT91EMAC          1
 151 #define CONFIG_SYS_RX_ETH_BUFFER        8
 152 #define CONFIG_RMII                     1
 153 #define CONFIG_MII                      1
 154 #define CONFIG_DRIVER_AT91EMAC_PHYADDR  1
 155 #define CONFIG_NET_RETRY_COUNT                  20
 156 #define CONFIG_KS8721_PHY                       1
 157
 158 #define CONFIG_SYS_FLASH_CFI                    1
 159 #define CONFIG_FLASH_CFI_DRIVER                 1
 160 #define CONFIG_SYS_FLASH_EMPTY_INFO             1
 161 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE       1
 162 #define CONFIG_SYS_MAX_FLASH_BANKS              1
 163 #define CONFIG_SYS_FLASH_PROTECTION             1
 164 #define PHYS_FLASH_1                            0x10000000
 165 #define CONFIG_SYS_FLASH_BASE                   PHYS_FLASH_1
 166 #define CONFIG_SYS_MAX_FLASH_SECT               128
 167 #define CONFIG_SYS_FLASH_CFI_WIDTH              FLASH_CFI_16BIT
 168
 169 #if defined(CONFIG_CMD_USB)
 170 #define CONFIG_USB_OHCI_NEW                     1
 171 #define CONFIG_USB_STORAGE                      1
 172 #define CONFIG_DOS_PARTITION                    1
 173 #define CONFIG_AT91C_PQFP_UHPBU                 1
 174 #undef CONFIG_SYS_USB_OHCI_BOARD_INIT
 175 #define CONFIG_SYS_USB_OHCI_CPU_INIT            1
 176 #define CONFIG_SYS_USB_OHCI_REGS_BASE           AT91_USB_HOST_BASE
 177 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "at91rm9200"
 178 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      15
 179 #endif
 180
 181 #define CONFIG_ENV_IS_IN_FLASH          1
 182 #define CONFIG_ENV_ADDR                 (PHYS_FLASH_1 + 0x20000)
 183 #define CONFIG_ENV_SIZE                 0x20000
 184 #define CONFIG_ENV_SECT_SIZE            0x20000
 185
 186 #define CONFIG_SYS_LOAD_ADDR            0x21000000
 187
 188 #define CONFIG_BAUDRATE                 115200
 189 #define CONFIG_SYS_BAUDRATE_TABLE       { 115200, 57600, 38400, 19200, 9600 }
 190
 191 #define CONFIG_SYS_PROMPT               "CPUAT91=> "
 192 #define CONFIG_SYS_CBSIZE               256
 193 #define CONFIG_SYS_MAXARGS              32
 194 #define CONFIG_SYS_PBSIZE               \
 195         (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 196 #define CONFIG_CMDLINE_EDITING          1
 197 #define CONFIG_SYS_LONGHELP             1
 198
 199 #define CONFIG_SYS_HZ                   1000
 200 #define CONFIG_SYS_HZ_CLOCK             (AT91C_MASTER_CLOCK / 2)
 201
 202 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 128 * 1024)
 203 #define CONFIG_SYS_GBL_DATA_SIZE        128
 204 #define CONFIG_STACKSIZE                (32 * 1024)
 205
 206 #if defined(CONFIG_USE_IRQ)
 207 #error CONFIG_USE_IRQ not supported
 208 #endif
 209
 210 #define CONFIG_DEVICE_NULLDEV           1
 211 #define CONFIG_SILENT_CONSOLE           1
 212
 213 #define CONFIG_AUTOBOOT_KEYED           1
 214 #define CONFIG_AUTOBOOT_PROMPT          \
 215         "Press SPACE to abort autoboot\n"
 216 #define CONFIG_AUTOBOOT_STOP_STR        " "
 217 #define CONFIG_AUTOBOOT_DELAY_STR       "d"
 218
 219 #define CONFIG_VERSION_VARIABLE         1
 220
 221 #define MTDIDS_DEFAULT                  "nor0=physmap-flash.0"
 222 #define MTDPARTS_DEFAULT                \
 223         "mtdparts=physmap-flash.0:"     \
 224                 "128k(u-boot)ro,"       \
 225                 "128k(u-boot-env),"     \
 226                 "1792k(kernel),"        \
 227                 "-(rootfs)"
 228
 229 #define CONFIG_BOOTARGS                 \
 230         "root=/dev/mtdblock3 rootfstype=jffs2 console=ttyS0,115200"
 231
 232 #define CONFIG_BOOTCOMMAND              "run flashboot"
 233
 234 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 235         "mtdid=" MTDIDS_DEFAULT "\0"                                    \
 236         "mtdparts=" MTDPARTS_DEFAULT "\0"                               \
 237         "flub=tftp 21000000 cpuat91/u-boot.bin; protect off 10000000 "  \
 238                 "1001FFFF; erase 10000000 1001FFFF; cp.b 21000000 "     \
 239                 "10000000 ${filesize}\0"                                \
 240         "flui=tftp 21000000 cpuat91/uImage; protect off 10040000 "      \
 241                 "1019ffff; erase 10040000 101fffff; cp.b 21000000 "     \
 242                 "10040000 ${filesize}\0"                                \
 243         "flrfs=tftp 21000000 cpuat91/rootfs.jffs2; protect off "        \
 244                 "10200000 10ffffff; erase 10200000 10ffffff; cp.b "     \
 245                 "21000000 10200000 ${filesize}\0"                       \
 246         "ramargs=setenv bootargs $(bootargs) $(mtdparts)\0"             \
 247         "flashboot=run ramargs;bootm 10040000\0"                        \
 248         "netboot=run ramargs;tftpboot 21000000 cpuat91/uImage;"         \
 249                 "bootm 21000000\0"
 250 #endif  /* _CONFIG_CPUAT91_H */