include/configs/davinci_dm6467evm.h

   1 /*
   2  * Copyright (C) 2009 Texas Instruments Incorporated
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License as
   6  * published by the Free Software Foundation; either version 2 of
   7  * the License, or (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  17  * MA 02111-1307 USA
  18  */
  19
  20 #ifndef __CONFIG_H
  21 #define __CONFIG_H
  22
  23 /* Spectrum Digital TMS320DM6467 EVM board */
  24 #define DAVINCI_DM6467EVM
  25 #define CONFIG_SYS_USE_NAND
  26 #define CONFIG_SYS_NAND_SMALLPAGE
  27
  28 #define CONFIG_SKIP_LOWLEVEL_INIT
  29
  30 /* SoC Configuration */
  31 #define CONFIG_ARM926EJS                                /* arm926ejs CPU */
  32
  33 /* Clock rates detection */
  34 #ifndef __ASSEMBLY__
  35 extern unsigned int davinci_arm_clk_get(void);
  36 #endif
  37
  38 #define CFG_REFCLK_FREQ         27000000
  39 /* Arm Clock frequency    */
  40 #define CONFIG_SYS_CLK_FREQ     davinci_arm_clk_get()
  41 /* Timer Input clock freq */
  42 #define CONFIG_SYS_HZ_CLOCK             (CONFIG_SYS_CLK_FREQ/2)
  43 #define CONFIG_SYS_TIMERBASE            0x01c21400      /* use timer 0 */
  44 #define CONFIG_SYS_HZ                   1000
  45 #define CONFIG_SOC_DM646X
  46
  47 /* EEPROM definitions for EEPROM */
  48 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          2
  49 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x50
  50 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       6
  51 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   20
  52
  53 /* Memory Info */
  54 #define CONFIG_SYS_MALLOC_LEN           (1 << 20)       /* 1 MiB */
  55 #define CONFIG_SYS_MEMTEST_START        0x80000000
  56 #define CONFIG_SYS_MEMTEST_END          0x81000000      /* 16MB RAM test */
  57 #define CONFIG_NR_DRAM_BANKS            1
  58 #define CONFIG_STACKSIZE                (256 << 10)     /* 256 KiB */
  59 #define PHYS_SDRAM_1                    0x80000000      /* DDR Start */
  60 #define PHYS_SDRAM_1_SIZE               (256 << 20)     /* DDR size 256MB */
  61
  62 /* Linux interfacing */
  63 #define CONFIG_CMDLINE_TAG
  64 #define CONFIG_SETUP_MEMORY_TAGS
  65 #define CONFIG_SYS_BARGSIZE             1024            /* Bootarg Size */
  66 #define CONFIG_SYS_LOAD_ADDR            0x80700000      /* kernel address */
  67 #define CONFIG_REVISION_TAG
  68
  69 /* Serial Driver info */
  70 #define CONFIG_SYS_NS16550
  71 #define CONFIG_SYS_NS16550_SERIAL
  72 #define CONFIG_SYS_NS16550_REG_SIZE     4
  73 #define CONFIG_SYS_NS16550_COM1         0x01c20000
  74 #define CONFIG_SYS_NS16550_CLK          24000000
  75 #define CONFIG_CONS_INDEX               1
  76 #define CONFIG_BAUDRATE                 115200
  77 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
  78
  79 /* I2C Configuration */
  80 #define CONFIG_HARD_I2C
  81 #define CONFIG_DRIVER_DAVINCI_I2C
  82 #define CONFIG_SYS_I2C_SPEED            80000
  83 #define CONFIG_SYS_I2C_SLAVE            10
  84
  85 /* Network & Ethernet Configuration */
  86 #define CONFIG_DRIVER_TI_EMAC
  87 #define CONFIG_MII
  88 #define CONFIG_BOOTP_DEFAULT
  89 #define CONFIG_BOOTP_DNS
  90 #define CONFIG_BOOTP_DNS2
  91 #define CONFIG_BOOTP_SEND_HOSTNAME
  92 #define CONFIG_NET_RETRY_COUNT  10
  93 #define CONFIG_CMD_NET
  94
  95 /* Flash & Environment */
  96 #define CONFIG_SYS_NO_FLASH
  97 #ifdef CONFIG_SYS_USE_NAND
  98 #define CONFIG_NAND_DAVINCI
  99 #define CONFIG_SYS_NAND_CS              2
 100 #undef CONFIG_ENV_IS_IN_FLASH
 101 #define CONFIG_ENV_IS_IN_NAND
 102 #define CONFIG_ENV_SIZE                 (16 << 10)      /* 16 KiB */
 103 #define CONFIG_SYS_NAND_BASE_LIST       {0x42000000, }
 104 #define CONFIG_SYS_NAND_HW_ECC
 105 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 106 #define CONFIG_ENV_OFFSET               0
 107 #else
 108 #define CONFIG_ENV_IS_NOWHERE
 109 #define CONFIG_ENV_SIZE                 (4 << 10)       /* 4 KiB */
 110 #endif
 111
 112 /* U-Boot general configuration */
 113 #undef CONFIG_USE_IRQ                           /* No IRQ/FIQ in U-Boot */
 114 #define CONFIG_BOOTDELAY        3
 115 #define CONFIG_BOOTFILE         "uImage"        /* Boot file name */
 116 #define CONFIG_SYS_PROMPT       "DM6467 EVM > " /* Monitor Command Prompt */
 117 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O Buffer Size  */
 118 #define CONFIG_SYS_PBSIZE               \
 119                         (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 120 #define CONFIG_SYS_MAXARGS              16
 121 #define CONFIG_VERSION_VARIABLE
 122 #define CONFIG_AUTO_COMPLETE
 123 #define CONFIG_SYS_HUSH_PARSER
 124 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 125 #define CONFIG_CMDLINE_EDITING
 126 #define CONFIG_SYS_LONGHELP
 127 #define CONFIG_CRC32_VERIFY
 128 #define CONFIG_MX_CYCLIC
 129 #define CONFIG_BOOTCOMMAND              "source 0x82080000; dhcp; bootm"
 130 #define CONFIG_BOOTARGS                 \
 131                                         "mem=120M console=ttyS0,115200n8 " \
 132                                         "root=/dev/hda1 rw noinitrd ip=dhcp"
 133
 134 /* U-Boot commands */
 135 #include <config_cmd_default.h>
 136 #define CONFIG_CMD_ASKENV
 137 #define CONFIG_CMD_DIAG
 138 #define CONFIG_CMD_I2C
 139 #define CONFIG_CMD_MII
 140 #define CONFIG_CMD_SAVES
 141 #define CONFIG_CMD_EEPROM
 142 #define CONFIG_CMD_PING
 143 #define CONFIG_CMD_DHCP
 144 #undef CONFIG_CMD_BDI
 145 #undef CONFIG_CMD_FPGA
 146 #undef CONFIG_CMD_SETGETDCR
 147 #ifdef CONFIG_SYS_USE_NAND
 148 #undef CONFIG_CMD_FLASH
 149 #undef CONFIG_CMD_IMLS
 150 #define CONFIG_CMD_NAND
 151 #endif
 152
 153 #ifdef CONFIG_CMD_BDI
 154 #define CONFIG_CLOCKS
 155 #endif
 156
 157 #define CONFIG_MAX_RAM_BANK_SIZE        (256 << 20)     /* 256 MB */
 158
 159 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 160 #define CONFIG_SYS_INIT_RAM_SIZE        0x1000
 161 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + \
 162                                          CONFIG_SYS_INIT_RAM_SIZE - \
 163                                          GENERATED_GBL_DATA_SIZE)
 164
 165 #endif /* __CONFIG_H */