include/configs/davinci_schmoogie.h

   1 /*
   2  * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #ifndef __CONFIG_H
   8 #define __CONFIG_H
   9
  10 /*=======*/
  11 /* Board */
  12 /*=======*/
  13 #define SCHMOOGIE
  14 #define CONFIG_SYS_NAND_LARGEPAGE
  15 #define CONFIG_SYS_USE_NAND
  16 #define MACH_TYPE_SCHMOOGIE 1255
  17 #define CONFIG_MACH_TYPE MACH_TYPE_SCHMOOGIE
  18
  19 /*===================*/
  20 /* SoC Configuration */
  21 /*===================*/
  22 #define CONFIG_ARM926EJS                        /* arm926ejs CPU core */
  23 #define CONFIG_SYS_TIMERBASE            0x01c21400      /* use timer 0 */
  24 #define CONFIG_SYS_HZ_CLOCK             27000000        /* Timer Input clock freq */
  25 #define CONFIG_SYS_HZ                   1000
  26 #define CONFIG_SOC_DM644X
  27 /*=============*/
  28 /* Memory Info */
  29 /*=============*/
  30 #define CONFIG_SYS_MALLOC_LEN           (0x10000 + 256*1024)    /* malloc() len */
  31 #define CONFIG_SYS_MEMTEST_START        0x80000000      /* memtest start address */
  32 #define CONFIG_SYS_MEMTEST_END          0x81000000      /* 16MB RAM test */
  33 #define CONFIG_NR_DRAM_BANKS    1               /* we have 1 bank of DRAM */
  34 #define PHYS_SDRAM_1            0x80000000      /* DDR Start */
  35 #define PHYS_SDRAM_1_SIZE       0x08000000      /* DDR size 128MB */
  36 #define DDR_4BANKS                              /* 4-bank DDR2 (128MB) */
  37 /*====================*/
  38 /* Serial Driver info */
  39 /*====================*/
  40 #define CONFIG_SYS_NS16550
  41 #define CONFIG_SYS_NS16550_SERIAL
  42 #define CONFIG_SYS_NS16550_REG_SIZE     -4      /* NS16550 register size, byteorder */
  43 #define CONFIG_SYS_NS16550_COM1 0x01c20000      /* Base address of UART0 */
  44 #define CONFIG_SYS_NS16550_CLK  CONFIG_SYS_HZ_CLOCK     /* Input clock to NS16550 */
  45 #define CONFIG_CONS_INDEX       1               /* use UART0 for console */
  46 #define CONFIG_BAUDRATE         115200          /* Default baud rate */
  47 /*===================*/
  48 /* I2C Configuration */
  49 /*===================*/
  50 #define CONFIG_HARD_I2C
  51 #define CONFIG_DRIVER_DAVINCI_I2C
  52 #define CONFIG_SYS_I2C_SPEED            80000   /* 100Kbps won't work, silicon bug */
  53 #define CONFIG_SYS_I2C_SLAVE            10      /* Bogus, master-only in U-Boot */
  54 /*==================================*/
  55 /* Network & Ethernet Configuration */
  56 /*==================================*/
  57 #define CONFIG_DRIVER_TI_EMAC
  58 #define CONFIG_MII
  59 #define CONFIG_BOOTP_DNS
  60 #define CONFIG_BOOTP_DNS2
  61 #define CONFIG_BOOTP_SEND_HOSTNAME
  62 #define CONFIG_NET_RETRY_COUNT  10
  63 #define CONFIG_OVERWRITE_ETHADDR_ONCE
  64 /*=====================*/
  65 /* Flash & Environment */
  66 /*=====================*/
  67 #undef CONFIG_ENV_IS_IN_FLASH
  68 #define CONFIG_SYS_NO_FLASH
  69 #define CONFIG_NAND_DAVINCI
  70 #define CONFIG_SYS_NAND_CS              2
  71 #define CONFIG_ENV_IS_IN_NAND           /* U-Boot env in NAND Flash  */
  72 #define CONFIG_ENV_SECT_SIZE    2048    /* Env sector Size */
  73 #define CONFIG_ENV_SIZE         (128 << 10)     /* 128 KiB */
  74 #define CONFIG_SKIP_LOWLEVEL_INIT       /* U-Boot is loaded by a bootloader */
  75 #define CONFIG_SYS_NAND_BASE            0x02000000
  76 #define CONFIG_SYS_NAND_HW_ECC
  77 #define CONFIG_SYS_MAX_NAND_DEVICE      1       /* Max number of NAND devices */
  78 #define CONFIG_ENV_OFFSET               0x0     /* Block 0--not used by bootcode */
  79 /*=====================*/
  80 /* Board related stuff */
  81 /*=====================*/
  82 #define CONFIG_RTC_DS1307               /* RTC chip on SCHMOOGIE */
  83 #define CONFIG_SYS_I2C_RTC_ADDR 0x6f    /* RTC chip I2C address */
  84 #define CONFIG_UID_DS28CM00             /* Unique ID on SCHMOOGIE */
  85 #define CONFIG_SYS_UID_ADDR             0x50    /* UID chip I2C address */
  86 /*==============================*/
  87 /* U-Boot general configuration */
  88 /*==============================*/
  89 #define CONFIG_MISC_INIT_R
  90 #undef CONFIG_BOOTDELAY
  91 #define CONFIG_BOOTFILE         "uImage"        /* Boot file name */
  92 #define CONFIG_SYS_PROMPT               "U-Boot > "     /* Monitor Command Prompt */
  93 #define CONFIG_SYS_CBSIZE               1024            /* Console I/O Buffer Size  */
  94 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)        /* Print buffer sz */
  95 #define CONFIG_SYS_MAXARGS              16              /* max number of command args */
  96 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size */
  97 #define CONFIG_SYS_LOAD_ADDR            0x80700000      /* default Linux kernel load address */
  98 #define CONFIG_VERSION_VARIABLE
  99 #define CONFIG_AUTO_COMPLETE            /* Won't work with hush so far, may be later */
 100 #define CONFIG_SYS_HUSH_PARSER
 101 #define CONFIG_CMDLINE_EDITING
 102 #define CONFIG_SYS_LONGHELP
 103 #define CONFIG_CRC32_VERIFY
 104 #define CONFIG_MX_CYCLIC
 105 /*===================*/
 106 /* Linux Information */
 107 /*===================*/
 108 #define LINUX_BOOT_PARAM_ADDR   0x80000100
 109 #define CONFIG_CMDLINE_TAG
 110 #define CONFIG_SETUP_MEMORY_TAGS
 111 #define CONFIG_BOOTARGS         "mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp"
 112 #define CONFIG_BOOTCOMMAND      "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot"
 113 /*=================*/
 114 /* U-Boot commands */
 115 /*=================*/
 116 #include <config_cmd_default.h>
 117 #define CONFIG_CMD_ASKENV
 118 #define CONFIG_CMD_DHCP
 119 #define CONFIG_CMD_DIAG
 120 #define CONFIG_CMD_I2C
 121 #define CONFIG_CMD_MII
 122 #define CONFIG_CMD_PING
 123 #define CONFIG_CMD_SAVES
 124 #define CONFIG_CMD_DATE
 125 #define CONFIG_CMD_NAND
 126 #undef CONFIG_CMD_EEPROM
 127 #undef CONFIG_CMD_BDI
 128 #undef CONFIG_CMD_FPGA
 129 #undef CONFIG_CMD_SETGETDCR
 130 #undef CONFIG_CMD_FLASH
 131 #undef CONFIG_CMD_IMLS
 132
 133 #ifdef CONFIG_CMD_BDI
 134 #define CONFIG_CLOCKS
 135 #endif
 136
 137 #define CONFIG_MAX_RAM_BANK_SIZE        (256 << 20)     /* 256 MB */
 138
 139 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 140 #define CONFIG_SYS_INIT_RAM_SIZE        0x1000
 141 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + \
 142                                          CONFIG_SYS_INIT_RAM_SIZE - \
 143                                          GENERATED_GBL_DATA_SIZE)
 144
 145 #endif /* __CONFIG_H */