include/configs/db-88f6820-gp.h

   1 /*
   2  * Copyright (C) 2014 Stefan Roese <sr@denx.de>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #ifndef _CONFIG_DB_88F6820_GP_H
   8 #define _CONFIG_DB_88F6820_GP_H
   9
  10 /*
  11  * High Level Configuration Options (easy to change)
  12  */
  13 #define CONFIG_ARMADA_XP                /* SOC Family Name */
  14 #define CONFIG_ARMADA_38X
  15 #define CONFIG_DB_88F6820_GP            /* Board target name for DDR training */
  16
  17 #define CONFIG_SYS_L2_PL310
  18
  19 #ifdef CONFIG_SPL_BUILD
  20 #define CONFIG_SKIP_LOWLEVEL_INIT       /* disable board lowlevel_init */
  21 #endif
  22 #define CONFIG_SYS_GENERIC_BOARD
  23 #define CONFIG_DISPLAY_BOARDINFO_LATE
  24
  25 /*
  26  * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
  27  * for DDR ECC byte filling in the SPL before loading the main
  28  * U-Boot into it.
  29  */
  30 #define CONFIG_SYS_TEXT_BASE    0x00800000
  31 #define CONFIG_SYS_TCLK         250000000       /* 250MHz */
  32
  33 /*
  34  * Commands configuration
  35  */
  36 #define CONFIG_SYS_NO_FLASH             /* Declare no flash (NOR/SPI) */
  37 #define CONFIG_CMD_CACHE
  38 #define CONFIG_CMD_DHCP
  39 #define CONFIG_CMD_ENV
  40 #define CONFIG_CMD_EXT2
  41 #define CONFIG_CMD_EXT4
  42 #define CONFIG_CMD_FAT
  43 #define CONFIG_CMD_FS_GENERIC
  44 #define CONFIG_CMD_I2C
  45 #define CONFIG_CMD_MMC
  46 #define CONFIG_CMD_PCI
  47 #define CONFIG_CMD_PING
  48 #define CONFIG_CMD_SCSI
  49 #define CONFIG_CMD_SF
  50 #define CONFIG_CMD_SPI
  51 #define CONFIG_CMD_TFTPPUT
  52 #define CONFIG_CMD_TIME
  53
  54 /* I2C */
  55 #define CONFIG_SYS_I2C
  56 #define CONFIG_SYS_I2C_MVTWSI
  57 #define CONFIG_I2C_MVTWSI_BASE0         MVEBU_TWSI_BASE
  58 #define CONFIG_SYS_I2C_SLAVE            0x0
  59 #define CONFIG_SYS_I2C_SPEED            100000
  60
  61 /* SPI NOR flash default params, used by sf commands */
  62 #define CONFIG_SF_DEFAULT_SPEED         1000000
  63 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_3
  64 #define CONFIG_SPI_FLASH_STMICRO
  65
  66 /*
  67  * SDIO/MMC Card Configuration
  68  */
  69 #define CONFIG_MMC
  70 #define CONFIG_MMC_SDMA
  71 #define CONFIG_GENERIC_MMC
  72 #define CONFIG_SDHCI
  73 #define CONFIG_MV_SDHCI
  74 #define CONFIG_SYS_MMC_BASE             MVEBU_SDIO_BASE
  75
  76 /*
  77  * SATA/SCSI/AHCI configuration
  78  */
  79 #define CONFIG_LIBATA
  80 #define CONFIG_SCSI_AHCI
  81 #define CONFIG_SCSI_AHCI_PLAT
  82 #define CONFIG_SYS_SCSI_MAX_SCSI_ID     2
  83 #define CONFIG_SYS_SCSI_MAX_LUN         1
  84 #define CONFIG_SYS_SCSI_MAX_DEVICE      (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
  85                                          CONFIG_SYS_SCSI_MAX_LUN)
  86
  87 /* Partition support */
  88 #define CONFIG_DOS_PARTITION
  89 #define CONFIG_EFI_PARTITION
  90
  91 /* Additional FS support/configuration */
  92 #define CONFIG_SUPPORT_VFAT
  93
  94 /* USB/EHCI configuration */
  95 #define CONFIG_EHCI_IS_TDI
  96
  97 /* Environment in SPI NOR flash */
  98 #define CONFIG_ENV_IS_IN_SPI_FLASH
  99 #define CONFIG_ENV_OFFSET               (1 << 20) /* 1MiB in */
 100 #define CONFIG_ENV_SIZE                 (64 << 10) /* 64KiB */
 101 #define CONFIG_ENV_SECT_SIZE            (256 << 10) /* 256KiB sectors */
 102
 103 #define CONFIG_PHY_MARVELL              /* there is a marvell phy */
 104 #define CONFIG_PHY_ADDR                 { 1, 0 }
 105 #define CONFIG_SYS_NETA_INTERFACE_TYPE  PHY_INTERFACE_MODE_RGMII
 106 #define PHY_ANEG_TIMEOUT        8000    /* PHY needs a longer aneg time */
 107
 108 /* PCIe support */
 109 #define CONFIG_PCI
 110 #define CONFIG_PCI_MVEBU
 111 #define CONFIG_PCI_PNP
 112 #define CONFIG_PCI_SCAN_SHOW
 113 #define CONFIG_E1000    /* enable Intel E1000 support for testing */
 114
 115 #define CONFIG_SYS_CONSOLE_INFO_QUIET   /* don't print console @ startup */
 116 #define CONFIG_SYS_ALT_MEMTEST
 117
 118 /* Keep device tree and initrd in lower memory so the kernel can access them */
 119 #define CONFIG_EXTRA_ENV_SETTINGS       \
 120         "fdt_high=0x10000000\0"         \
 121         "initrd_high=0x10000000\0"
 122
 123 /* SPL */
 124 /*
 125  * Select the boot device here
 126  *
 127  * Currently supported are:
 128  * SPL_BOOT_SPI_NOR_FLASH       - Booting via SPI NOR flash
 129  * SPL_BOOT_SDIO_MMC_CARD       - Booting via SDIO/MMC card (partition 1)
 130  */
 131 #define SPL_BOOT_SPI_NOR_FLASH          1
 132 #define SPL_BOOT_SDIO_MMC_CARD          2
 133 #define CONFIG_SPL_BOOT_DEVICE          SPL_BOOT_SPI_NOR_FLASH
 134
 135 /* Defines for SPL */
 136 #define CONFIG_SPL_FRAMEWORK
 137 #define CONFIG_SPL_SIZE                 (140 << 10)
 138 #define CONFIG_SPL_TEXT_BASE            0x40000030
 139 #define CONFIG_SPL_MAX_SIZE             (CONFIG_SPL_SIZE - 0x0030)
 140
 141 #define CONFIG_SPL_BSS_START_ADDR       (0x40000000 + CONFIG_SPL_SIZE)
 142 #define CONFIG_SPL_BSS_MAX_SIZE         (16 << 10)
 143
 144 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
 145                                          CONFIG_SPL_BSS_MAX_SIZE)
 146 #define CONFIG_SYS_SPL_MALLOC_SIZE      (16 << 10)
 147
 148 #define CONFIG_SPL_STACK                (0x40000000 + ((192 - 16) << 10))
 149 #define CONFIG_SPL_BOOTROM_SAVE         (CONFIG_SPL_STACK + 4)
 150
 151 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 152 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 153 #define CONFIG_SPL_SERIAL_SUPPORT
 154 #define CONFIG_SPL_I2C_SUPPORT
 155
 156 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
 157 /* SPL related SPI defines */
 158 #define CONFIG_SPL_SPI_SUPPORT
 159 #define CONFIG_SPL_SPI_FLASH_SUPPORT
 160 #define CONFIG_SPL_SPI_LOAD
 161 #define CONFIG_SPL_SPI_BUS              0
 162 #define CONFIG_SPL_SPI_CS               0
 163 #define CONFIG_SYS_SPI_U_BOOT_OFFS      0x20000
 164 #define CONFIG_SYS_U_BOOT_OFFS          CONFIG_SYS_SPI_U_BOOT_OFFS
 165 #endif
 166
 167 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
 168 /* SPL related MMC defines */
 169 #define CONFIG_SPL_MMC_SUPPORT
 170 #define CONFIG_SPL_LIBDISK_SUPPORT
 171 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
 172 #define CONFIG_SYS_MMC_U_BOOT_OFFS              (160 << 10)
 173 #define CONFIG_SYS_U_BOOT_OFFS                  CONFIG_SYS_MMC_U_BOOT_OFFS
 174 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512)
 175 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      ((512 << 10) / 512) /* 512KiB */
 176 #ifdef CONFIG_SPL_BUILD
 177 #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER       0x00180000      /* in SDRAM */
 178 #endif
 179 #endif
 180
 181 /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
 182 #define CONFIG_SYS_MVEBU_DDR_A38X
 183 #define CONFIG_DDR3
 184
 185 /*
 186  * mv-common.h should be defined after CMD configs since it used them
 187  * to enable certain macros
 188  */
 189 #include "mv-common.h"
 190
 191 #endif /* _CONFIG_DB_88F6820_GP_H */