include/configs/dbau1x00.h

   1 /*
   2  * (C) Copyright 2003
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 /*
  25  * This file contains the configuration parameters for the dbau1x00 board.
  26  */
  27
  28 #ifndef __CONFIG_H
  29 #define __CONFIG_H
  30
  31 #define CONFIG_MIPS32           1  /* MIPS32 CPU core   */
  32 #define CONFIG_DBAU1X00         1
  33 #define CONFIG_AU1X00           1  /* alchemy series cpu */
  34
  35 #ifdef CONFIG_DBAU1000
  36 /* Also known as Merlot */
  37 #define CONFIG_AU1000           1
  38 #else
  39 #ifdef CONFIG_DBAU1100
  40 #define CONFIG_AU1100           1
  41 #else
  42 #ifdef CONFIG_DBAU1500
  43 #define CONFIG_AU1500           1
  44 #else
  45 #ifdef CONFIG_DBAU1550
  46 /* Cabernet */
  47 #define CONFIG_AU1550           1
  48 #else
  49 #error "No valid board set"
  50 #endif
  51 #endif
  52 #endif
  53 #endif
  54
  55 #define CONFIG_ETHADDR          DE:AD:BE:EF:01:01    /* Ethernet address */
  56
  57 #define CONFIG_BOOTDELAY        2       /* autoboot after 2 seconds     */
  58
  59 #define CONFIG_BAUDRATE         115200
  60
  61 /* valid baudrates */
  62 #define CFG_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
  63
  64 #define CONFIG_TIMESTAMP                /* Print image info with timestamp */
  65 #undef  CONFIG_BOOTARGS
  66
  67 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
  68         "addmisc=setenv bootargs ${bootargs} "                          \
  69                 "console=ttyS0,${baudrate} "                            \
  70                 "panic=1\0"                                             \
  71         "bootfile=/tftpboot/vmlinux.srec\0"                             \
  72         "load=tftp 80500000 ${u-boot}\0"                                \
  73         ""
  74
  75 #ifdef CONFIG_DBAU1550
  76 /* Boot from flash by default, revert to bootp */
  77 #define CONFIG_BOOTCOMMAND      "bootm 0xbfc20000; bootp; bootm"
  78 #else /* CONFIG_DBAU1550 */
  79 #define CONFIG_BOOTCOMMAND      "bootp;bootm"
  80 #endif /* CONFIG_DBAU1550 */
  81
  82
  83 /*
  84  * BOOTP options
  85  */
  86 #define CONFIG_BOOTP_BOOTFILESIZE
  87 #define CONFIG_BOOTP_BOOTPATH
  88 #define CONFIG_BOOTP_GATEWAY
  89 #define CONFIG_BOOTP_HOSTNAME
  90
  91
  92 /*
  93  * Command line configuration.
  94  */
  95 #include <config_cmd_default.h>
  96
  97 #undef CONFIG_CMD_BDI
  98 #undef CONFIG_CMD_BEDBUG
  99 #undef CONFIG_CMD_ELF
 100 #undef CONFIG_CMD_ENV
 101 #undef CONFIG_CMD_FAT
 102 #undef CONFIG_CMD_FPGA
 103 #undef CONFIG_CMD_MII
 104 #undef CONFIG_CMD_RUN
 105
 106
 107 #ifdef CONFIG_DBAU1550
 108
 109 #define CONFIG_CMD_FLASH
 110 #define CONFIG_CMD_LOADB
 111 #define CONFIG_CMD_NET
 112
 113 #undef CONFIG_CMD_I2C
 114 #undef CONFIG_CMD_IDE
 115 #undef CONFIG_CMD_NFS
 116 #undef CONFIG_CMD_PCMCIA
 117
 118 #else
 119
 120 #define CONFIG_CMD_IDE
 121 #define CONFIG_CMD_DHCP
 122
 123 #undef CONFIG_CMD_FLASH
 124 #undef CONFIG_CMD_LOADB
 125 #undef CONFIG_CMD_LOADS
 126
 127 #endif
 128
 129
 130 /*
 131  * Miscellaneous configurable options
 132  */
 133 #define CFG_LONGHELP                            /* undef to save memory      */
 134
 135 #define CFG_PROMPT              "DbAu1xx0 # "   /* Monitor Command Prompt    */
 136
 137 #define CFG_CBSIZE              256             /* Console I/O Buffer Size   */
 138 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)  /* Print Buffer Size */
 139 #define CFG_MAXARGS             16              /* max number of command args*/
 140
 141 #define CFG_MALLOC_LEN          128*1024
 142
 143 #define CFG_BOOTPARAMS_LEN      128*1024
 144
 145 #define CFG_MHZ                 396
 146
 147 #if (CFG_MHZ % 12) != 0
 148 #error "Invalid CPU frequency - must be multiple of 12!"
 149 #endif
 150
 151 #define CFG_HZ                  (CFG_MHZ * 1000000) /* FIXME causes overflow in net.c */
 152
 153 #define CFG_SDRAM_BASE          0x80000000     /* Cached addr */
 154
 155 #define CFG_LOAD_ADDR           0x81000000     /* default load address  */
 156
 157 #define CFG_MEMTEST_START       0x80100000
 158 #define CFG_MEMTEST_END         0x80800000
 159
 160 /*-----------------------------------------------------------------------
 161  * FLASH and environment organization
 162  */
 163 #ifdef CONFIG_DBAU1550
 164
 165 #define CFG_MAX_FLASH_BANKS     2       /* max number of memory banks */
 166 #define CFG_MAX_FLASH_SECT      (512)   /* max number of sectors on one chip */
 167
 168 #define PHYS_FLASH_1            0xb8000000 /* Flash Bank #1 */
 169 #define PHYS_FLASH_2            0xbc000000 /* Flash Bank #2 */
 170
 171 #else /* CONFIG_DBAU1550 */
 172
 173 #define CFG_MAX_FLASH_BANKS     2       /* max number of memory banks */
 174 #define CFG_MAX_FLASH_SECT      (128)   /* max number of sectors on one chip */
 175
 176 #define PHYS_FLASH_1            0xbec00000 /* Flash Bank #1 */
 177 #define PHYS_FLASH_2            0xbfc00000 /* Flash Bank #2 */
 178
 179 #endif /* CONFIG_DBAU1550 */
 180
 181 #define CFG_FLASH_BANKS_LIST {PHYS_FLASH_1, PHYS_FLASH_2}
 182
 183 #define CFG_FLASH_CFI           1
 184 #define CFG_FLASH_CFI_DRIVER    1
 185
 186 /* The following #defines are needed to get flash environment right */
 187 #define CFG_MONITOR_BASE        TEXT_BASE
 188 #define CFG_MONITOR_LEN         (192 << 10)
 189
 190 #define CFG_INIT_SP_OFFSET      0x400000
 191
 192 /* We boot from this flash, selected with dip switch */
 193 #define CFG_FLASH_BASE          PHYS_FLASH_2
 194
 195 /* timeout values are in ticks */
 196 #define CFG_FLASH_ERASE_TOUT    (2 * CFG_HZ) /* Timeout for Flash Erase */
 197 #define CFG_FLASH_WRITE_TOUT    (2 * CFG_HZ) /* Timeout for Flash Write */
 198
 199 #define CFG_ENV_IS_NOWHERE      1
 200
 201 /* Address and size of Primary Environment Sector       */
 202 #define CFG_ENV_ADDR            0xB0030000
 203 #define CFG_ENV_SIZE            0x10000
 204
 205 #define CONFIG_FLASH_16BIT
 206
 207 #define CONFIG_NR_DRAM_BANKS    2
 208
 209 #define CONFIG_NET_MULTI
 210
 211 #ifdef CONFIG_DBAU1550
 212 #define MEM_SIZE 192
 213 #else
 214 #define MEM_SIZE 64
 215 #endif
 216
 217 #define CONFIG_MEMSIZE_IN_BYTES
 218
 219 #ifndef CONFIG_DBAU1550
 220 /*---ATA PCMCIA ------------------------------------*/
 221 #define CFG_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
 222 #define CFG_PCMCIA_MEM_ADDR 0x20000000
 223 #define CONFIG_PCMCIA_SLOT_A
 224
 225 #define CONFIG_ATAPI 1
 226 #define CONFIG_MAC_PARTITION 1
 227
 228 /* We run CF in "true ide" mode or a harddrive via pcmcia */
 229 #define CONFIG_IDE_PCMCIA 1
 230
 231 /* We only support one slot for now */
 232 #define CFG_IDE_MAXBUS          1       /* max. 1 IDE bus               */
 233 #define CFG_IDE_MAXDEVICE       1       /* max. 1 drive per IDE bus     */
 234
 235 #undef  CONFIG_IDE_LED                  /* LED   for ide not supported  */
 236 #undef  CONFIG_IDE_RESET                /* reset for ide not supported  */
 237
 238 #define CFG_ATA_IDE0_OFFSET     0x0000
 239
 240 #define CFG_ATA_BASE_ADDR       CFG_PCMCIA_MEM_ADDR
 241
 242 /* Offset for data I/O                  */
 243 #define CFG_ATA_DATA_OFFSET     8
 244
 245 /* Offset for normal register accesses  */
 246 #define CFG_ATA_REG_OFFSET      0
 247
 248 /* Offset for alternate registers       */
 249 #define CFG_ATA_ALT_OFFSET      0x0100
 250 #endif /* CONFIG_DBAU1550 */
 251
 252 /*-----------------------------------------------------------------------
 253  * Cache Configuration
 254  */
 255 #define CFG_DCACHE_SIZE         16384
 256 #define CFG_ICACHE_SIZE         16384
 257 #define CFG_CACHELINE_SIZE      32
 258
 259 #endif  /* __CONFIG_H */