include/configs/dbau1x00.h

   1 /*
   2  * (C) Copyright 2003
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 /*
   9  * This file contains the configuration parameters for the dbau1x00 board.
  10  */
  11
  12 #ifndef __CONFIG_H
  13 #define __CONFIG_H
  14
  15 #define CONFIG_DBAU1X00         1
  16 #define CONFIG_SOC_AU1X00       1  /* alchemy series cpu */
  17
  18 #define CONFIG_DISPLAY_BOARDINFO
  19
  20 #ifdef CONFIG_DBAU1000
  21 /* Also known as Merlot */
  22 #define CONFIG_SOC_AU1000       1
  23 #else
  24 #ifdef CONFIG_DBAU1100
  25 #define CONFIG_SOC_AU1100       1
  26 #else
  27 #ifdef CONFIG_DBAU1500
  28 #define CONFIG_SOC_AU1500       1
  29 #else
  30 #ifdef CONFIG_DBAU1550
  31 /* Cabernet */
  32 #define CONFIG_SOC_AU1550       1
  33 #else
  34 #error "No valid board set"
  35 #endif
  36 #endif
  37 #endif
  38 #endif
  39
  40 #define CONFIG_BOOTDELAY        2       /* autoboot after 2 seconds     */
  41
  42 #define CONFIG_BAUDRATE         115200
  43
  44 /* valid baudrates */
  45
  46 #define CONFIG_TIMESTAMP                /* Print image info with timestamp */
  47 #undef  CONFIG_BOOTARGS
  48
  49 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
  50         "addmisc=setenv bootargs ${bootargs} "                          \
  51                 "console=ttyS0,${baudrate} "                            \
  52                 "panic=1\0"                                             \
  53         "bootfile=/tftpboot/vmlinux.srec\0"                             \
  54         "load=tftp 80500000 ${u-boot}\0"                                \
  55         ""
  56
  57 #ifdef CONFIG_DBAU1550
  58 /* Boot from flash by default, revert to bootp */
  59 #define CONFIG_BOOTCOMMAND      "bootm 0xbfc20000; bootp; bootm"
  60 #else /* CONFIG_DBAU1550 */
  61 #define CONFIG_BOOTCOMMAND      "bootp;bootm"
  62 #endif /* CONFIG_DBAU1550 */
  63
  64
  65 /*
  66  * BOOTP options
  67  */
  68 #define CONFIG_BOOTP_BOOTFILESIZE
  69 #define CONFIG_BOOTP_BOOTPATH
  70 #define CONFIG_BOOTP_GATEWAY
  71 #define CONFIG_BOOTP_HOSTNAME
  72
  73
  74 /*
  75  * Command line configuration.
  76  */
  77 #undef CONFIG_CMD_BEDBUG
  78 #undef CONFIG_CMD_FAT
  79 #undef CONFIG_CMD_MII
  80
  81 #ifdef CONFIG_DBAU1550
  82
  83 #undef CONFIG_CMD_I2C
  84 #undef CONFIG_CMD_IDE
  85 #undef CONFIG_CMD_PCMCIA
  86
  87 #else
  88
  89 #define CONFIG_CMD_IDE
  90 #define CONFIG_CMD_DHCP
  91
  92 #endif
  93
  94
  95 /*
  96  * Miscellaneous configurable options
  97  */
  98 #define CONFIG_SYS_LONGHELP                             /* undef to save memory      */
  99
 100 #define CONFIG_SYS_CBSIZE               256             /* Console I/O Buffer Size   */
 101 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)  /* Print Buffer Size */
 102 #define CONFIG_SYS_MAXARGS              16              /* max number of command args*/
 103
 104 #define CONFIG_SYS_MALLOC_LEN           128*1024
 105
 106 #define CONFIG_SYS_BOOTPARAMS_LEN       128*1024
 107
 108 #define CONFIG_SYS_MHZ                  396
 109
 110 #if (CONFIG_SYS_MHZ % 12) != 0
 111 #error "Invalid CPU frequency - must be multiple of 12!"
 112 #endif
 113
 114 #define CONFIG_SYS_MIPS_TIMER_FREQ      (CONFIG_SYS_MHZ * 1000000)
 115
 116 #define CONFIG_SYS_SDRAM_BASE           0x80000000     /* Cached addr */
 117
 118 #define CONFIG_SYS_LOAD_ADDR            0x81000000     /* default load address  */
 119
 120 #define CONFIG_SYS_MEMTEST_START        0x80100000
 121 #define CONFIG_SYS_MEMTEST_END          0x80800000
 122
 123 /*-----------------------------------------------------------------------
 124  * FLASH and environment organization
 125  */
 126 #ifdef CONFIG_DBAU1550
 127
 128 #define CONFIG_SYS_MAX_FLASH_BANKS      2       /* max number of memory banks */
 129 #define CONFIG_SYS_MAX_FLASH_SECT       (512)   /* max number of sectors on one chip */
 130
 131 #define PHYS_FLASH_1            0xb8000000 /* Flash Bank #1 */
 132 #define PHYS_FLASH_2            0xbc000000 /* Flash Bank #2 */
 133
 134 #else /* CONFIG_DBAU1550 */
 135
 136 #define CONFIG_SYS_MAX_FLASH_BANKS      2       /* max number of memory banks */
 137 #define CONFIG_SYS_MAX_FLASH_SECT       (128)   /* max number of sectors on one chip */
 138
 139 #define PHYS_FLASH_1            0xbec00000 /* Flash Bank #1 */
 140 #define PHYS_FLASH_2            0xbfc00000 /* Flash Bank #2 */
 141
 142 #endif /* CONFIG_DBAU1550 */
 143
 144 #define CONFIG_SYS_FLASH_BANKS_LIST {PHYS_FLASH_1, PHYS_FLASH_2}
 145
 146 #define CONFIG_SYS_FLASH_CFI           1
 147 #define CONFIG_FLASH_CFI_DRIVER    1
 148
 149 /* The following #defines are needed to get flash environment right */
 150 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
 151 #define CONFIG_SYS_MONITOR_LEN          (192 << 10)
 152
 153 #define CONFIG_SYS_INIT_SP_OFFSET       0x400000
 154
 155 /* We boot from this flash, selected with dip switch */
 156 #define CONFIG_SYS_FLASH_BASE           PHYS_FLASH_2
 157
 158 /* timeout values are in ticks */
 159 #define CONFIG_SYS_FLASH_ERASE_TOUT     (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
 160 #define CONFIG_SYS_FLASH_WRITE_TOUT     (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
 161
 162 #define CONFIG_ENV_IS_NOWHERE   1
 163
 164 /* Address and size of Primary Environment Sector       */
 165 #define CONFIG_ENV_ADDR         0xB0030000
 166 #define CONFIG_ENV_SIZE         0x10000
 167
 168 #define CONFIG_FLASH_16BIT
 169
 170 #define CONFIG_NR_DRAM_BANKS    2
 171
 172
 173 #ifdef CONFIG_DBAU1550
 174 #define MEM_SIZE 192
 175 #else
 176 #define MEM_SIZE 64
 177 #endif
 178
 179 #define CONFIG_MEMSIZE_IN_BYTES
 180
 181 #ifndef CONFIG_DBAU1550
 182 /*---ATA PCMCIA ------------------------------------*/
 183 #define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
 184 #define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000
 185 #define CONFIG_PCMCIA_SLOT_A
 186
 187 #define CONFIG_ATAPI 1
 188 #define CONFIG_MAC_PARTITION 1
 189
 190 /* We run CF in "true ide" mode or a harddrive via pcmcia */
 191 #define CONFIG_IDE_PCMCIA 1
 192
 193 /* We only support one slot for now */
 194 #define CONFIG_SYS_IDE_MAXBUS           1       /* max. 1 IDE bus               */
 195 #define CONFIG_SYS_IDE_MAXDEVICE        1       /* max. 1 drive per IDE bus     */
 196
 197 #undef  CONFIG_IDE_LED                  /* LED   for ide not supported  */
 198 #undef  CONFIG_IDE_RESET                /* reset for ide not supported  */
 199
 200 #define CONFIG_SYS_ATA_IDE0_OFFSET      0x0000
 201
 202 #define CONFIG_SYS_ATA_BASE_ADDR       CONFIG_SYS_PCMCIA_MEM_ADDR
 203
 204 /* Offset for data I/O                  */
 205 #define CONFIG_SYS_ATA_DATA_OFFSET     8
 206
 207 /* Offset for normal register accesses  */
 208 #define CONFIG_SYS_ATA_REG_OFFSET      0
 209
 210 /* Offset for alternate registers       */
 211 #define CONFIG_SYS_ATA_ALT_OFFSET      0x0100
 212 #endif /* CONFIG_DBAU1550 */
 213
 214 /*-----------------------------------------------------------------------
 215  * Cache Configuration
 216  */
 217 #define CONFIG_SYS_DCACHE_SIZE          16384
 218 #define CONFIG_SYS_ICACHE_SIZE          16384
 219 #define CONFIG_SYS_CACHELINE_SIZE       32
 220
 221 #endif  /* __CONFIG_H */