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1 /*
2 * (C) Copyright 2006-2008
3 * Texas Instruments.
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com>
6 *
7 * (C) Copyright 2009
8 * Frederik Kriewitz <frederik@kriewitz.eu>
9 *
10 * Configuration settings for the DevKit8000 board.
11 *
12 * SPDX-License-Identifier: GPL-2.0+
13 */
14
15 #ifndef __CONFIG_H
16 #define __CONFIG_H
17
18 /* High Level Configuration Options */
19 #define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT8000
20
21 /*
22 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
23 * 64 bytes before this address should be set aside for u-boot.img's
24 * header. That is 0x800FFFC0--0x80100000 should not be used for any
25 * other needs.
26 */
27
28 #define CONFIG_SPL_BSS_START_ADDR 0x80000500 /* leave space for bootargs*/
29 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
30
31 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
32 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
33
34 /* Physical Memory Map */
35 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
36
37 #include <configs/ti_omap3_common.h>
38
39 #define CONFIG_MISC_INIT_R
40
41 #define CONFIG_REVISION_TAG 1
42
43 /* Size of malloc() pool */
44 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
45 /* Sector */
46 #undef CONFIG_SYS_MALLOC_LEN
47 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
48
49 /* Hardware drivers */
50 /* DM9000 */
51 #define CONFIG_NET_RETRY_COUNT 20
52 #define CONFIG_DRIVER_DM9000 1
53 #define CONFIG_DM9000_BASE 0x2c000000
54 #define DM9000_IO CONFIG_DM9000_BASE
55 #define DM9000_DATA (CONFIG_DM9000_BASE + 0x400)
56 #define CONFIG_DM9000_USE_16BIT 1
57 #define CONFIG_DM9000_NO_SROM 1
58 #undef CONFIG_DM9000_DEBUG
59
60 /* SPI */
61 #undef CONFIG_SPI
62
63 /* I2C */
64
65 /* TWL4030 */
66 #define CONFIG_TWL4030_LED 1
67
68 /* Board NAND Info */
69
70 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
71 /* to access nand */
72 #define CONFIG_JFFS2_NAND
73 /* nand device jffs2 lives on */
74 #define CONFIG_JFFS2_DEV "nand0"
75 /* start of jffs2 partition */
76 #define CONFIG_JFFS2_PART_OFFSET 0x680000
77 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
78 /* partition */
79
80 /* BOOTP/DHCP options */
81 #define CONFIG_BOOTP_NISDOMAIN
82 #define CONFIG_BOOTP_BOOTFILESIZE
83 #define CONFIG_BOOTP_DNS2
84 #define CONFIG_BOOTP_SEND_HOSTNAME
85 #define CONFIG_BOOTP_NTPSERVER
86 #define CONFIG_BOOTP_TIMEOFFSET
87 #undef CONFIG_BOOTP_VENDOREX
88
89 /* Environment information */
90 #define CONFIG_EXTRA_ENV_SETTINGS \
91 "loadaddr=0x82000000\0" \
92 "console=ttyO2,115200n8\0" \
93 "mmcdev=0\0" \
94 "vram=12M\0" \
95 "dvimode=1024x768MR-16@60\0" \
96 "defaultdisplay=dvi\0" \
97 "nfsopts=hard,tcp,rsize=65536,wsize=65536\0" \
98 "kernelopts=rw\0" \
99 "commonargs=" \
100 "setenv bootargs console=${console} " \
101 "vram=${vram} " \
102 "omapfb.mode=dvi:${dvimode} " \
103 "omapdss.def_disp=${defaultdisplay}\0" \
104 "mmcargs=" \
105 "run commonargs; " \
106 "setenv bootargs ${bootargs} " \
107 "root=/dev/mmcblk0p2 " \
108 "rootwait " \
109 "${kernelopts}\0" \
110 "nandargs=" \
111 "run commonargs; " \
112 "setenv bootargs ${bootargs} " \
113 "omapfb.mode=dvi:${dvimode} " \
114 "omapdss.def_disp=${defaultdisplay} " \
115 "root=/dev/mtdblock4 " \
116 "rootfstype=jffs2 " \
117 "${kernelopts}\0" \
118 "netargs=" \
119 "run commonargs; " \
120 "setenv bootargs ${bootargs} " \
121 "root=/dev/nfs " \
122 "nfsroot=${serverip}:${rootpath},${nfsopts} " \
123 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off " \
124 "${kernelopts} " \
125 "dnsip1=${dnsip} " \
126 "dnsip2=${dnsip2}\0" \
127 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
128 "bootscript=echo Running bootscript from mmc ...; " \
129 "source ${loadaddr}\0" \
130 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
131 "eraseenv=nand unlock 0x260000 0x20000; nand erase 0x260000 0x20000\0" \
132 "mmcboot=echo Booting from mmc ...; " \
133 "run mmcargs; " \
134 "bootm ${loadaddr}\0" \
135 "nandboot=echo Booting from nand ...; " \
136 "run nandargs; " \
137 "nand read ${loadaddr} 280000 400000; " \
138 "bootm ${loadaddr}\0" \
139 "netboot=echo Booting from network ...; " \
140 "dhcp ${loadaddr}; " \
141 "run netargs; " \
142 "bootm ${loadaddr}\0" \
143 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
144 "if run loadbootscript; then " \
145 "run bootscript; " \
146 "else " \
147 "if run loaduimage; then " \
148 "run mmcboot; " \
149 "else run nandboot; " \
150 "fi; " \
151 "fi; " \
152 "else run nandboot; fi\0"
153
154 #define CONFIG_BOOTCOMMAND "run autoboot"
155
156 /* Boot Argument Buffer Size */
157 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x07000000)
158 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
159 0x01000000) /* 16MB */
160
161 /* NAND and environment organization */
162
163 #define CONFIG_ENV_OFFSET 0x260000
164
165 /* SRAM config */
166 #define CONFIG_SYS_SRAM_START 0x40200000
167 #define CONFIG_SYS_SRAM_SIZE 0x10000
168
169 /* Defines for SPL */
170
171 #undef CONFIG_SPL_TEXT_BASE
172 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
173
174 /* NAND boot config */
175 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
176 #define CONFIG_SYS_NAND_PAGE_COUNT 64
177 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
178 #define CONFIG_SYS_NAND_OOBSIZE 64
179 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
180 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
181 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
182 10, 11, 12, 13}
183
184 #define CONFIG_SYS_NAND_ECCSIZE 512
185 #define CONFIG_SYS_NAND_ECCBYTES 3
186 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
187
188 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
189 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000
190
191 /* SPL OS boot options */
192 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
193
194 #undef CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
195 #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR
196 #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
197 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x500 /* address 0xa0000 */
198 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x8 /* address 0x1000 */
199 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 8 /* 4KB */
200
201 #undef CONFIG_SYS_SPL_ARGS_ADDR
202 #define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100)
203
204 #endif /* __CONFIG_H */