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1 /*
2 * (C) Copyright 2013
3 * Texas Instruments Incorporated.
4 * Lokesh Vutla <lokeshvutla@ti.com>
5 *
6 * Configuration settings for the TI DRA7XX board.
7 * See ti_omap5_common.h for omap5 common settings.
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 */
11
12 #ifndef __CONFIG_DRA7XX_EVM_H
13 #define __CONFIG_DRA7XX_EVM_H
14
15 #define CONFIG_DRA7XX
16 #define CONFIG_BOARD_EARLY_INIT_F
17
18 #ifdef CONFIG_SPL_BUILD
19 #define CONFIG_IODELAY_RECALIBRATION
20 #endif
21
22 #define CONFIG_VERY_BIG_RAM
23 #define CONFIG_PHYS_64BIT
24 #define CONFIG_NR_DRAM_BANKS 2
25 #define CONFIG_MAX_MEM_MAPPED 0x80000000
26
27 #ifndef CONFIG_QSPI_BOOT
28 /* MMC ENV related defines */
29 #define CONFIG_ENV_IS_IN_MMC
30 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
31 #define CONFIG_ENV_SIZE (128 << 10)
32 #define CONFIG_ENV_OFFSET 0xE0000
33 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
34 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
35 #endif
36
37 #if (CONFIG_CONS_INDEX == 1)
38 #define CONSOLEDEV "ttyO0"
39 #elif (CONFIG_CONS_INDEX == 3)
40 #define CONSOLEDEV "ttyO2"
41 #endif
42 #define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */
43 #define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
44 #define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
45 #define CONFIG_BAUDRATE 115200
46
47 #define CONFIG_SYS_OMAP_ABE_SYSCK
48
49 #ifndef CONFIG_SPL_BUILD
50 /* Define the default GPT table for eMMC */
51 #define PARTS_DEFAULT \
52 /* Linux partitions */ \
53 "uuid_disk=${uuid_gpt_disk};" \
54 "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \
55 /* Android partitions */ \
56 "partitions_android=" \
57 "uuid_disk=${uuid_gpt_disk};" \
58 "name=xloader,start=128K,size=128K,uuid=${uuid_gpt_xloader};" \
59 "name=bootloader,size=384K,uuid=${uuid_gpt_bootloader};" \
60 "name=environment,size=128K,uuid=${uuid_gpt_environment};" \
61 "name=misc,size=128K,uuid=${uuid_gpt_misc};" \
62 "name=efs,start=1280K,size=16M,uuid=${uuid_gpt_efs};" \
63 "name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \
64 "name=recovery,size=10M,uuid=${uuid_gpt_recovery};" \
65 "name=boot,size=10M,uuid=${uuid_gpt_boot};" \
66 "name=system,size=768M,uuid=${uuid_gpt_system};" \
67 "name=cache,size=256M,uuid=${uuid_gpt_cache};" \
68 "name=ipu1,size=1M,uuid=${uuid_gpt_ipu1};" \
69 "name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \
70 "name=userdata,size=-,uuid=${uuid_gpt_userdata}"
71
72 #define DFU_ALT_INFO_MMC \
73 "dfu_alt_info_mmc=" \
74 "boot part 0 1;" \
75 "rootfs part 0 2;" \
76 "MLO fat 0 1;" \
77 "MLO.raw raw 0x100 0x100;" \
78 "u-boot.img.raw raw 0x300 0x400;" \
79 "spl-os-args.raw raw 0x80 0x80;" \
80 "spl-os-image.raw raw 0x900 0x2000;" \
81 "spl-os-args fat 0 1;" \
82 "spl-os-image fat 0 1;" \
83 "u-boot.img fat 0 1;" \
84 "uEnv.txt fat 0 1\0"
85
86 #define DFU_ALT_INFO_EMMC \
87 "dfu_alt_info_emmc=" \
88 "rawemmc raw 0 3751936;" \
89 "boot part 1 1;" \
90 "rootfs part 1 2;" \
91 "MLO fat 1 1;" \
92 "MLO.raw raw 0x100 0x100;" \
93 "u-boot.img.raw raw 0x300 0x400;" \
94 "spl-os-args.raw raw 0x80 0x80;" \
95 "spl-os-image.raw raw 0x900 0x2000;" \
96 "spl-os-args fat 1 1;" \
97 "spl-os-image fat 1 1;" \
98 "u-boot.img fat 1 1;" \
99 "uEnv.txt fat 1 1\0"
100
101 #define DFU_ALT_INFO_RAM \
102 "dfu_alt_info_ram=" \
103 "kernel ram 0x80200000 0x4000000;" \
104 "fdt ram 0x80f80000 0x80000;" \
105 "ramdisk ram 0x81000000 0x4000000\0"
106
107 #define DFU_ALT_INFO_QSPI \
108 "dfu_alt_info_qspi=" \
109 "MLO raw 0x0 0x010000;" \
110 "MLO.backup1 raw 0x010000 0x010000;" \
111 "MLO.backup2 raw 0x020000 0x010000;" \
112 "MLO.backup3 raw 0x030000 0x010000;" \
113 "u-boot.img raw 0x040000 0x0100000;" \
114 "u-boot-spl-os raw 0x140000 0x080000;" \
115 "u-boot-env raw 0x1C0000 0x010000;" \
116 "u-boot-env.backup raw 0x1D0000 0x010000;" \
117 "kernel raw 0x1E0000 0x800000\0"
118
119 #define DFUARGS \
120 "dfu_bufsiz=0x10000\0" \
121 DFU_ALT_INFO_MMC \
122 DFU_ALT_INFO_EMMC \
123 DFU_ALT_INFO_RAM \
124 DFU_ALT_INFO_QSPI
125
126 /* Fastboot */
127 #define CONFIG_USB_FUNCTION_FASTBOOT
128 #define CONFIG_CMD_FASTBOOT
129 #define CONFIG_ANDROID_BOOT_IMAGE
130 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
131 #define CONFIG_FASTBOOT_BUF_SIZE 0x2F000000
132 #define CONFIG_FASTBOOT_FLASH
133 #define CONFIG_FASTBOOT_FLASH_MMC_DEV 1
134 #endif
135
136 #include <configs/ti_omap5_common.h>
137
138 /* Enhance our eMMC support / experience. */
139 #define CONFIG_CMD_GPT
140 #define CONFIG_EFI_PARTITION
141 #define CONFIG_RANDOM_UUID
142 #define CONFIG_HSMMC2_8BIT
143
144 /* CPSW Ethernet */
145 #define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
146 #define CONFIG_BOOTP_DNS2
147 #define CONFIG_BOOTP_SEND_HOSTNAME
148 #define CONFIG_BOOTP_GATEWAY
149 #define CONFIG_BOOTP_SUBNETMASK
150 #define CONFIG_NET_RETRY_COUNT 10
151 #define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
152 #define CONFIG_MII /* Required in net/eth.c */
153 #define CONFIG_PHY_GIGE /* per-board part of CPSW */
154 #define CONFIG_PHYLIB
155 #define CONFIG_PHY_TI
156
157 /* SPI */
158 #undef CONFIG_OMAP3_SPI
159 #define CONFIG_TI_SPI_MMAP
160 #define CONFIG_SF_DEFAULT_SPEED 64000000
161 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
162 #define CONFIG_QSPI_QUAD_SUPPORT
163
164 #ifdef CONFIG_SPL_BUILD
165 #undef CONFIG_DM_SPI
166 #undef CONFIG_DM_SPI_FLASH
167 #endif
168
169 /*
170 * Default to using SPI for environment, etc.
171 * 0x000000 - 0x010000 : QSPI.SPL (64KiB)
172 * 0x010000 - 0x020000 : QSPI.SPL.backup1 (64KiB)
173 * 0x020000 - 0x030000 : QSPI.SPL.backup2 (64KiB)
174 * 0x030000 - 0x040000 : QSPI.SPL.backup3 (64KiB)
175 * 0x040000 - 0x140000 : QSPI.u-boot (1MiB)
176 * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB)
177 * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB)
178 * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB)
179 * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB)
180 * 0x9E0000 - 0x2000000 : USERLAND
181 */
182 #define CONFIG_SYS_SPI_KERNEL_OFFS 0x1E0000
183 #define CONFIG_SYS_SPI_ARGS_OFFS 0x140000
184 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
185 #if defined(CONFIG_QSPI_BOOT)
186 /* In SPL, use the environment and discard MMC support for space. */
187 #ifdef CONFIG_SPL_BUILD
188 #undef CONFIG_SPL_MMC_SUPPORT
189 #undef CONFIG_SPL_MAX_SIZE
190 #define CONFIG_SPL_MAX_SIZE (64 << 10) /* 64 KiB */
191 #endif
192 #define CONFIG_SPL_ENV_SUPPORT
193 #define CONFIG_ENV_IS_IN_SPI_FLASH
194 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
195 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
196 #define CONFIG_ENV_SIZE (64 << 10)
197 #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */
198 #define CONFIG_ENV_OFFSET 0x1C0000
199 #define CONFIG_ENV_OFFSET_REDUND 0x1D0000
200 #endif
201
202 /* SPI SPL */
203 #define CONFIG_SPL_SPI_SUPPORT
204 #define CONFIG_SPL_DMA_SUPPORT
205 #define CONFIG_TI_EDMA3
206 #define CONFIG_SPL_SPI_LOAD
207 #define CONFIG_SPL_SPI_FLASH_SUPPORT
208 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
209
210 #define CONFIG_SUPPORT_EMMC_BOOT
211
212 /* USB xHCI HOST */
213 #define CONFIG_USB_HOST
214 #define CONFIG_USB_XHCI
215 #define CONFIG_USB_XHCI_DWC3
216 #define CONFIG_USB_XHCI_OMAP
217 #define CONFIG_USB_STORAGE
218 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
219
220 #define CONFIG_OMAP_USB_PHY
221 #define CONFIG_OMAP_USB2PHY2_HOST
222
223 /* USB Device Firmware Update support */
224 #define CONFIG_USB_FUNCTION_DFU
225 #define CONFIG_DFU_RAM
226
227 #define CONFIG_DFU_MMC
228 #define CONFIG_DFU_RAM
229 #define CONFIG_DFU_SF
230
231 /* SATA */
232 #define CONFIG_BOARD_LATE_INIT
233 #define CONFIG_CMD_SCSI
234 #define CONFIG_LIBATA
235 #define CONFIG_SCSI_AHCI
236 #define CONFIG_SCSI_AHCI_PLAT
237 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
238 #define CONFIG_SYS_SCSI_MAX_LUN 1
239 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
240 CONFIG_SYS_SCSI_MAX_LUN)
241
242 /* NAND support */
243 #ifdef CONFIG_NAND
244 /* NAND: device related configs */
245 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
246 #define CONFIG_SYS_NAND_OOBSIZE 64
247 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
248 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
249 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
250 CONFIG_SYS_NAND_PAGE_SIZE)
251 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
252 /* NAND: driver related configs */
253 #define CONFIG_NAND_OMAP_GPMC
254 #define CONFIG_NAND_OMAP_ELM
255 #define CONFIG_SYS_NAND_ONFI_DETECTION
256 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
257 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
258 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
259 10, 11, 12, 13, 14, 15, 16, 17, \
260 18, 19, 20, 21, 22, 23, 24, 25, \
261 26, 27, 28, 29, 30, 31, 32, 33, \
262 34, 35, 36, 37, 38, 39, 40, 41, \
263 42, 43, 44, 45, 46, 47, 48, 49, \
264 50, 51, 52, 53, 54, 55, 56, 57, }
265 #define CONFIG_SYS_NAND_ECCSIZE 512
266 #define CONFIG_SYS_NAND_ECCBYTES 14
267 #define MTDIDS_DEFAULT "nand0=nand.0"
268 #define MTDPARTS_DEFAULT "mtdparts=nand.0:" \
269 "128k(NAND.SPL)," \
270 "128k(NAND.SPL.backup1)," \
271 "128k(NAND.SPL.backup2)," \
272 "128k(NAND.SPL.backup3)," \
273 "256k(NAND.u-boot-spl-os)," \
274 "1m(NAND.u-boot)," \
275 "128k(NAND.u-boot-env)," \
276 "128k(NAND.u-boot-env.backup1)," \
277 "8m(NAND.kernel)," \
278 "-(NAND.file-system)"
279 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000
280 /* NAND: SPL related configs */
281 #ifdef CONFIG_SPL_NAND_SUPPORT
282 #define CONFIG_SPL_NAND_AM33XX_BCH
283 #endif
284 /* NAND: SPL falcon mode configs */
285 #ifdef CONFIG_SPL_OS_BOOT
286 #define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os-boot params*/
287 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
288 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
289 #endif
290 #endif /* !CONFIG_NAND */
291
292 /* Parallel NOR Support */
293 #if defined(CONFIG_NOR)
294 /* NOR: device related configs */
295 #define CONFIG_SYS_MAX_FLASH_SECT 512
296 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
297 #define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */
298 /* #define CONFIG_INIT_IGNORE_ERROR */
299 #undef CONFIG_SYS_NO_FLASH
300 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
301 #define CONFIG_SYS_FLASH_PROTECTION
302 #define CONFIG_SYS_FLASH_CFI
303 #define CONFIG_FLASH_CFI_DRIVER
304 #define CONFIG_FLASH_CFI_MTD
305 #define CONFIG_SYS_MAX_FLASH_BANKS 1
306 #define CONFIG_SYS_FLASH_BASE (0x08000000)
307 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
308 /* Reduce SPL size by removing unlikey targets */
309 #ifdef CONFIG_NOR_BOOT
310 #define CONFIG_ENV_IS_IN_FLASH
311 #define CONFIG_ENV_SECT_SIZE (128 * 1024) /* 128 KiB */
312 #define MTDIDS_DEFAULT "nor0=physmap-flash.0"
313 #define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:" \
314 "128k(NOR.SPL)," \
315 "128k(NOR.SPL.backup1)," \
316 "128k(NOR.SPL.backup2)," \
317 "128k(NOR.SPL.backup3)," \
318 "256k(NOR.u-boot-spl-os)," \
319 "1m(NOR.u-boot)," \
320 "128k(NOR.u-boot-env)," \
321 "128k(NOR.u-boot-env.backup1)," \
322 "8m(NOR.kernel)," \
323 "-(NOR.rootfs)"
324 #define CONFIG_ENV_OFFSET 0x001c0000
325 #define CONFIG_ENV_OFFSET_REDUND 0x001e0000
326 #endif
327 #endif /* NOR support */
328
329 /* EEPROM */
330 #define CONFIG_EEPROM_CHIP_ADDRESS 0x50
331 #define CONFIG_EEPROM_BUS_ADDRESS 0
332
333 #endif /* __CONFIG_DRA7XX_EVM_H */