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1 /*
2 * (C) Copyright 2013
3 * Texas Instruments Incorporated.
4 * Lokesh Vutla <lokeshvutla@ti.com>
5 *
6 * Configuration settings for the TI DRA7XX board.
7 * See ti_omap5_common.h for omap5 common settings.
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 */
11
12 #ifndef __CONFIG_DRA7XX_EVM_H
13 #define __CONFIG_DRA7XX_EVM_H
14
15 #define CONFIG_DRA7XX
16 #define CONFIG_BOARD_EARLY_INIT_F
17
18 #ifdef CONFIG_SPL_BUILD
19 #define CONFIG_IODELAY_RECALIBRATION
20 #endif
21
22 #define CONFIG_VERY_BIG_RAM
23 #define CONFIG_NR_DRAM_BANKS 2
24 #define CONFIG_MAX_MEM_MAPPED 0x80000000
25
26 #ifndef CONFIG_QSPI_BOOT
27 /* MMC ENV related defines */
28 #define CONFIG_ENV_IS_IN_MMC
29 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
30 #define CONFIG_ENV_SIZE (128 << 10)
31 #define CONFIG_ENV_OFFSET 0xE0000
32 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
33 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
34 #endif
35
36 #if (CONFIG_CONS_INDEX == 1)
37 #define CONSOLEDEV "ttyO0"
38 #elif (CONFIG_CONS_INDEX == 3)
39 #define CONSOLEDEV "ttyO2"
40 #endif
41 #define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */
42 #define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
43 #define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
44 #define CONFIG_BAUDRATE 115200
45
46 #define CONFIG_SYS_OMAP_ABE_SYSCK
47
48 #ifndef CONFIG_SPL_BUILD
49 /* Define the default GPT table for eMMC */
50 #define PARTS_DEFAULT \
51 /* Linux partitions */ \
52 "uuid_disk=${uuid_gpt_disk};" \
53 "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \
54 /* Android partitions */ \
55 "partitions_android=" \
56 "uuid_disk=${uuid_gpt_disk};" \
57 "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \
58 "name=bootloader,size=768K,uuid=${uuid_gpt_bootloader};" \
59 "name=environment,size=128K,uuid=${uuid_gpt_environment};" \
60 "name=misc,size=128K,uuid=${uuid_gpt_misc};" \
61 "name=reserved,size=256K,uuid=${uuid_gpt_reserved};" \
62 "name=efs,size=16M,uuid=${uuid_gpt_efs};" \
63 "name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \
64 "name=recovery,size=10M,uuid=${uuid_gpt_recovery};" \
65 "name=boot,size=10M,uuid=${uuid_gpt_boot};" \
66 "name=system,size=768M,uuid=${uuid_gpt_system};" \
67 "name=cache,size=256M,uuid=${uuid_gpt_cache};" \
68 "name=ipu1,size=1M,uuid=${uuid_gpt_ipu1};" \
69 "name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \
70 "name=userdata,size=-,uuid=${uuid_gpt_userdata}"
71
72 #define DFU_ALT_INFO_MMC \
73 "dfu_alt_info_mmc=" \
74 "boot part 0 1;" \
75 "rootfs part 0 2;" \
76 "MLO fat 0 1;" \
77 "MLO.raw raw 0x100 0x100;" \
78 "u-boot.img.raw raw 0x300 0x400;" \
79 "spl-os-args.raw raw 0x80 0x80;" \
80 "spl-os-image.raw raw 0x900 0x2000;" \
81 "spl-os-args fat 0 1;" \
82 "spl-os-image fat 0 1;" \
83 "u-boot.img fat 0 1;" \
84 "uEnv.txt fat 0 1\0"
85
86 #define DFU_ALT_INFO_EMMC \
87 "dfu_alt_info_emmc=" \
88 "rawemmc raw 0 3751936;" \
89 "boot part 1 1;" \
90 "rootfs part 1 2;" \
91 "MLO fat 1 1;" \
92 "MLO.raw raw 0x100 0x100;" \
93 "u-boot.img.raw raw 0x300 0x400;" \
94 "spl-os-args.raw raw 0x80 0x80;" \
95 "spl-os-image.raw raw 0x900 0x2000;" \
96 "spl-os-args fat 1 1;" \
97 "spl-os-image fat 1 1;" \
98 "u-boot.img fat 1 1;" \
99 "uEnv.txt fat 1 1\0"
100
101 #define DFU_ALT_INFO_RAM \
102 "dfu_alt_info_ram=" \
103 "kernel ram 0x80200000 0x4000000;" \
104 "fdt ram 0x80f80000 0x80000;" \
105 "ramdisk ram 0x81000000 0x4000000\0"
106
107 #define DFU_ALT_INFO_QSPI \
108 "dfu_alt_info_qspi=" \
109 "MLO raw 0x0 0x040000;" \
110 "u-boot.img raw 0x040000 0x0100000;" \
111 "u-boot-spl-os raw 0x140000 0x080000;" \
112 "u-boot-env raw 0x1C0000 0x010000;" \
113 "u-boot-env.backup raw 0x1D0000 0x010000;" \
114 "kernel raw 0x1E0000 0x800000\0"
115
116 #define DFUARGS \
117 "dfu_bufsiz=0x10000\0" \
118 DFU_ALT_INFO_MMC \
119 DFU_ALT_INFO_EMMC \
120 DFU_ALT_INFO_RAM \
121 DFU_ALT_INFO_QSPI
122 #else
123 /* Discard fastboot in SPL build, to spare some space */
124 #undef CONFIG_FASTBOOT
125 #undef CONFIG_USB_FUNCTION_FASTBOOT
126 #undef CONFIG_CMD_FASTBOOT
127 #undef CONFIG_ANDROID_BOOT_IMAGE
128 #undef CONFIG_FASTBOOT_BUF_ADDR
129 #undef CONFIG_FASTBOOT_BUF_SIZE
130 #undef CONFIG_FASTBOOT_FLASH
131 #endif
132
133 #ifdef CONFIG_SPL_BUILD
134 #undef CONFIG_CMD_BOOTD
135 #ifdef CONFIG_SPL_DFU_SUPPORT
136 #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000
137 #define CONFIG_SPL_HASH_SUPPORT
138 #define DFU_ALT_INFO_RAM \
139 "dfu_alt_info_ram=" \
140 "kernel ram 0x80200000 0x4000000;" \
141 "fdt ram 0x80f80000 0x80000;" \
142 "ramdisk ram 0x81000000 0x4000000\0"
143 #define DFUARGS \
144 "dfu_bufsiz=0x10000\0" \
145 DFU_ALT_INFO_RAM
146 #endif
147 #endif
148
149 #include <configs/ti_omap5_common.h>
150
151 /* Enhance our eMMC support / experience. */
152 #define CONFIG_CMD_GPT
153 #define CONFIG_EFI_PARTITION
154 #define CONFIG_RANDOM_UUID
155 #define CONFIG_HSMMC2_8BIT
156
157 /* CPSW Ethernet */
158 #define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
159 #define CONFIG_BOOTP_DNS2
160 #define CONFIG_BOOTP_SEND_HOSTNAME
161 #define CONFIG_BOOTP_GATEWAY
162 #define CONFIG_BOOTP_SUBNETMASK
163 #define CONFIG_NET_RETRY_COUNT 10
164 #define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
165 #define CONFIG_MII /* Required in net/eth.c */
166 #define CONFIG_PHY_GIGE /* per-board part of CPSW */
167 #define CONFIG_PHYLIB
168 #define CONFIG_PHY_TI
169
170 /* SPI */
171 #undef CONFIG_OMAP3_SPI
172 #define CONFIG_TI_SPI_MMAP
173 #define CONFIG_SF_DEFAULT_SPEED 76800000
174 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
175 #define CONFIG_QSPI_QUAD_SUPPORT
176
177 #ifdef CONFIG_SPL_BUILD
178 #undef CONFIG_DM_SPI
179 #undef CONFIG_DM_SPI_FLASH
180 #endif
181
182 /*
183 * Default to using SPI for environment, etc.
184 * 0x000000 - 0x040000 : QSPI.SPL (256KiB)
185 * 0x040000 - 0x140000 : QSPI.u-boot (1MiB)
186 * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB)
187 * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB)
188 * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB)
189 * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB)
190 * 0x9E0000 - 0x2000000 : USERLAND
191 */
192 #define CONFIG_SYS_SPI_KERNEL_OFFS 0x1E0000
193 #define CONFIG_SYS_SPI_ARGS_OFFS 0x140000
194 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
195 #if defined(CONFIG_QSPI_BOOT)
196 #define CONFIG_ENV_IS_IN_SPI_FLASH
197 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
198 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
199 #define CONFIG_ENV_SIZE (64 << 10)
200 #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */
201 #define CONFIG_ENV_OFFSET 0x1C0000
202 #define CONFIG_ENV_OFFSET_REDUND 0x1D0000
203 #endif
204
205 /* SPI SPL */
206 #define CONFIG_TI_EDMA3
207 #define CONFIG_SPL_SPI_LOAD
208 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
209
210 #define CONFIG_SUPPORT_EMMC_BOOT
211
212 /* USB xHCI HOST */
213 #define CONFIG_USB_XHCI_OMAP
214 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
215
216 #define CONFIG_OMAP_USB_PHY
217 #define CONFIG_OMAP_USB2PHY2_HOST
218
219 /* SATA */
220 #define CONFIG_BOARD_LATE_INIT
221 #define CONFIG_SCSI
222 #define CONFIG_LIBATA
223 #define CONFIG_SCSI_AHCI
224 #define CONFIG_SCSI_AHCI_PLAT
225 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
226 #define CONFIG_SYS_SCSI_MAX_LUN 1
227 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
228 CONFIG_SYS_SCSI_MAX_LUN)
229
230 /* NAND support */
231 #ifdef CONFIG_NAND
232 /* NAND: device related configs */
233 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
234 #define CONFIG_SYS_NAND_OOBSIZE 64
235 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
236 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
237 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
238 CONFIG_SYS_NAND_PAGE_SIZE)
239 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
240 /* NAND: driver related configs */
241 #define CONFIG_NAND_OMAP_GPMC
242 #define CONFIG_NAND_OMAP_ELM
243 #define CONFIG_SYS_NAND_ONFI_DETECTION
244 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
245 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
246 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
247 10, 11, 12, 13, 14, 15, 16, 17, \
248 18, 19, 20, 21, 22, 23, 24, 25, \
249 26, 27, 28, 29, 30, 31, 32, 33, \
250 34, 35, 36, 37, 38, 39, 40, 41, \
251 42, 43, 44, 45, 46, 47, 48, 49, \
252 50, 51, 52, 53, 54, 55, 56, 57, }
253 #define CONFIG_SYS_NAND_ECCSIZE 512
254 #define CONFIG_SYS_NAND_ECCBYTES 14
255 #define MTDIDS_DEFAULT "nand0=nand.0"
256 #define MTDPARTS_DEFAULT "mtdparts=nand.0:" \
257 "128k(NAND.SPL)," \
258 "128k(NAND.SPL.backup1)," \
259 "128k(NAND.SPL.backup2)," \
260 "128k(NAND.SPL.backup3)," \
261 "256k(NAND.u-boot-spl-os)," \
262 "1m(NAND.u-boot)," \
263 "128k(NAND.u-boot-env)," \
264 "128k(NAND.u-boot-env.backup1)," \
265 "8m(NAND.kernel)," \
266 "-(NAND.file-system)"
267 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000
268 /* NAND: SPL related configs */
269 #ifdef CONFIG_SPL_NAND_SUPPORT
270 #define CONFIG_SPL_NAND_AM33XX_BCH
271 #endif
272 /* NAND: SPL falcon mode configs */
273 #ifdef CONFIG_SPL_OS_BOOT
274 #define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os-boot params*/
275 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
276 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
277 #endif
278 #endif /* !CONFIG_NAND */
279
280 /* Parallel NOR Support */
281 #if defined(CONFIG_NOR)
282 /* NOR: device related configs */
283 #define CONFIG_SYS_MAX_FLASH_SECT 512
284 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
285 #define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */
286 /* #define CONFIG_INIT_IGNORE_ERROR */
287 #undef CONFIG_SYS_NO_FLASH
288 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
289 #define CONFIG_SYS_FLASH_PROTECTION
290 #define CONFIG_SYS_FLASH_CFI
291 #define CONFIG_FLASH_CFI_DRIVER
292 #define CONFIG_FLASH_CFI_MTD
293 #define CONFIG_SYS_MAX_FLASH_BANKS 1
294 #define CONFIG_SYS_FLASH_BASE (0x08000000)
295 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
296 /* Reduce SPL size by removing unlikey targets */
297 #ifdef CONFIG_NOR_BOOT
298 #define CONFIG_ENV_IS_IN_FLASH
299 #define CONFIG_ENV_SECT_SIZE (128 * 1024) /* 128 KiB */
300 #define MTDIDS_DEFAULT "nor0=physmap-flash.0"
301 #define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:" \
302 "128k(NOR.SPL)," \
303 "128k(NOR.SPL.backup1)," \
304 "128k(NOR.SPL.backup2)," \
305 "128k(NOR.SPL.backup3)," \
306 "256k(NOR.u-boot-spl-os)," \
307 "1m(NOR.u-boot)," \
308 "128k(NOR.u-boot-env)," \
309 "128k(NOR.u-boot-env.backup1)," \
310 "8m(NOR.kernel)," \
311 "-(NOR.rootfs)"
312 #define CONFIG_ENV_OFFSET 0x001c0000
313 #define CONFIG_ENV_OFFSET_REDUND 0x001e0000
314 #endif
315 #endif /* NOR support */
316
317 /* EEPROM */
318 #define CONFIG_EEPROM_CHIP_ADDRESS 0x50
319 #define CONFIG_EEPROM_BUS_ADDRESS 0
320
321 #endif /* __CONFIG_DRA7XX_EVM_H */