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1 /*
2 * (C) Copyright 2013
3 * Texas Instruments Incorporated.
4 * Lokesh Vutla <lokeshvutla@ti.com>
5 *
6 * Configuration settings for the TI DRA7XX board.
7 * See ti_omap5_common.h for omap5 common settings.
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 */
11
12 #ifndef __CONFIG_DRA7XX_EVM_H
13 #define __CONFIG_DRA7XX_EVM_H
14
15 #define CONFIG_DRA7XX
16 #define CONFIG_BOARD_EARLY_INIT_F
17
18 #ifndef CONFIG_QSPI_BOOT
19 /* MMC ENV related defines */
20 #define CONFIG_ENV_IS_IN_MMC
21 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
22 #define CONFIG_ENV_SIZE (128 << 10)
23 #define CONFIG_ENV_OFFSET 0xE0000
24 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
25 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
26 #endif
27 #define CONFIG_CMD_SAVEENV
28
29 #if (CONFIG_CONS_INDEX == 1)
30 #define CONSOLEDEV "ttyO0"
31 #elif (CONFIG_CONS_INDEX == 3)
32 #define CONSOLEDEV "ttyO2"
33 #endif
34 #define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */
35 #define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
36 #define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
37 #define CONFIG_BAUDRATE 115200
38
39 #define CONFIG_SYS_OMAP_ABE_SYSCK
40
41 /* Define the default GPT table for eMMC */
42 #define PARTS_DEFAULT \
43 "uuid_disk=${uuid_gpt_disk};" \
44 "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}"
45
46 #include <configs/ti_omap5_common.h>
47
48 /* Enhance our eMMC support / experience. */
49 #define CONFIG_CMD_GPT
50 #define CONFIG_EFI_PARTITION
51 #define CONFIG_PARTITION_UUIDS
52 #define CONFIG_CMD_PART
53
54 /* CPSW Ethernet */
55 #define CONFIG_CMD_NET /* 'bootp' and 'tftp' */
56 #define CONFIG_CMD_DHCP
57 #define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
58 #define CONFIG_BOOTP_DNS2
59 #define CONFIG_BOOTP_SEND_HOSTNAME
60 #define CONFIG_BOOTP_GATEWAY
61 #define CONFIG_BOOTP_SUBNETMASK
62 #define CONFIG_NET_RETRY_COUNT 10
63 #define CONFIG_CMD_PING
64 #define CONFIG_CMD_MII
65 #define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
66 #define CONFIG_MII /* Required in net/eth.c */
67 #define CONFIG_PHY_GIGE /* per-board part of CPSW */
68 #define CONFIG_PHYLIB
69
70 /* SPI */
71 #undef CONFIG_OMAP3_SPI
72 #define CONFIG_TI_QSPI
73 #define CONFIG_SPI_FLASH
74 #define CONFIG_SPI_FLASH_SPANSION
75 #define CONFIG_CMD_SF
76 #define CONFIG_CMD_SPI
77 #define CONFIG_SPI_FLASH_BAR
78 #define CONFIG_TI_SPI_MMAP
79 #define CONFIG_SF_DEFAULT_SPEED 48000000
80 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3
81
82 /*
83 * Default to using SPI for environment, etc.
84 * 0x000000 - 0x010000 : QSPI.SPL (64KiB)
85 * 0x010000 - 0x020000 : QSPI.SPL.backup1 (64KiB)
86 * 0x020000 - 0x030000 : QSPI.SPL.backup2 (64KiB)
87 * 0x030000 - 0x040000 : QSPI.SPL.backup3 (64KiB)
88 * 0x040000 - 0x140000 : QSPI.u-boot (1MiB)
89 * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB)
90 * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB)
91 * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB)
92 * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB)
93 * 0x9E0000 - 0x2000000 : USERLAND
94 */
95 #define CONFIG_SYS_SPI_KERNEL_OFFS 0x1E0000
96 #define CONFIG_SYS_SPI_ARGS_OFFS 0x140000
97 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
98 #if defined(CONFIG_QSPI_BOOT)
99 /* In SPL, use the environment and discard MMC support for space. */
100 #ifdef CONFIG_SPL_BUILD
101 #undef CONFIG_SPL_MMC_SUPPORT
102 #undef CONFIG_SPL_MAX_SIZE
103 #define CONFIG_SPL_MAX_SIZE (64 << 10) /* 64 KiB */
104 #endif
105 #define CONFIG_SPL_ENV_SUPPORT
106 #define CONFIG_ENV_IS_IN_SPI_FLASH
107 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
108 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
109 #define CONFIG_ENV_SIZE (64 << 10)
110 #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */
111 #define CONFIG_ENV_OFFSET 0x1C0000
112 #define CONFIG_ENV_OFFSET_REDUND 0x1D0000
113 #endif
114
115 /* SPI SPL */
116 #define CONFIG_SPL_SPI_SUPPORT
117 #define CONFIG_SPL_SPI_LOAD
118 #define CONFIG_SPL_SPI_FLASH_SUPPORT
119 #define CONFIG_SPL_SPI_BUS 0
120 #define CONFIG_SPL_SPI_CS 0
121 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
122
123 #define CONFIG_SUPPORT_EMMC_BOOT
124
125 /* USB xHCI HOST */
126 #define CONFIG_CMD_USB
127 #define CONFIG_USB_HOST
128 #define CONFIG_USB_XHCI
129 #define CONFIG_USB_XHCI_OMAP
130 #define CONFIG_USB_STORAGE
131 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
132
133 #define CONFIG_OMAP_USB_PHY
134 #define CONFIG_OMAP_USB2PHY2_HOST
135
136 /* SATA */
137 #define CONFIG_BOARD_LATE_INIT
138 #define CONFIG_CMD_SCSI
139 #define CONFIG_LIBATA
140 #define CONFIG_SCSI_AHCI
141 #define CONFIG_SCSI_AHCI_PLAT
142 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
143 #define CONFIG_SYS_SCSI_MAX_LUN 1
144 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
145 CONFIG_SYS_SCSI_MAX_LUN)
146
147 /* NAND support */
148 #ifdef CONFIG_NAND
149 /* NAND: device related configs */
150 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
151 #define CONFIG_SYS_NAND_OOBSIZE 64
152 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
153 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
154 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
155 CONFIG_SYS_NAND_PAGE_SIZE)
156 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
157 /* NAND: driver related configs */
158 #define CONFIG_NAND_OMAP_GPMC
159 #define CONFIG_NAND_OMAP_ELM
160 #define CONFIG_SYS_NAND_ONFI_DETECTION
161 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
162 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
163 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
164 10, 11, 12, 13, 14, 15, 16, 17, \
165 18, 19, 20, 21, 22, 23, 24, 25, \
166 26, 27, 28, 29, 30, 31, 32, 33, \
167 34, 35, 36, 37, 38, 39, 40, 41, \
168 42, 43, 44, 45, 46, 47, 48, 49, \
169 50, 51, 52, 53, 54, 55, 56, 57, }
170 #define CONFIG_SYS_NAND_ECCSIZE 512
171 #define CONFIG_SYS_NAND_ECCBYTES 14
172 #define MTDIDS_DEFAULT "nand0=nand.0"
173 #define MTDPARTS_DEFAULT "mtdparts=nand.0:" \
174 "128k(NAND.SPL)," \
175 "128k(NAND.SPL.backup1)," \
176 "128k(NAND.SPL.backup2)," \
177 "128k(NAND.SPL.backup3)," \
178 "256k(NAND.u-boot-spl-os)," \
179 "1m(NAND.u-boot)," \
180 "128k(NAND.u-boot-env)," \
181 "128k(NAND.u-boot-env.backup1)," \
182 "8m(NAND.kernel)," \
183 "-(NAND.rootfs)"
184 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000
185 /* NAND: SPL related configs */
186 #ifdef CONFIG_SPL_NAND_SUPPORT
187 #define CONFIG_SPL_NAND_AM33XX_BCH
188 #endif
189 /* NAND: SPL falcon mode configs */
190 #ifdef CONFIG_SPL_OS_BOOT
191 #define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os-boot params*/
192 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
193 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
194 #endif
195 #endif /* !CONFIG_NAND */
196
197 /* Parallel NOR Support */
198 #if defined(CONFIG_NOR)
199 /* NOR: device related configs */
200 #define CONFIG_SYS_MAX_FLASH_SECT 512
201 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
202 #define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */
203 /* #define CONFIG_INIT_IGNORE_ERROR */
204 #undef CONFIG_SYS_NO_FLASH
205 #define CONFIG_CMD_FLASH
206 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
207 #define CONFIG_SYS_FLASH_PROTECTION
208 #define CONFIG_SYS_FLASH_CFI
209 #define CONFIG_FLASH_CFI_DRIVER
210 #define CONFIG_FLASH_CFI_MTD
211 #define CONFIG_SYS_MAX_FLASH_BANKS 1
212 #define CONFIG_SYS_FLASH_BASE (0x08000000)
213 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
214 /* Reduce SPL size by removing unlikey targets */
215 #ifdef CONFIG_NOR_BOOT
216 #define CONFIG_ENV_IS_IN_FLASH
217 #define CONFIG_ENV_SECT_SIZE (128 * 1024) /* 128 KiB */
218 #define MTDIDS_DEFAULT "nor0=physmap-flash.0"
219 #define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:" \
220 "128k(NOR.SPL)," \
221 "128k(NOR.SPL.backup1)," \
222 "128k(NOR.SPL.backup2)," \
223 "128k(NOR.SPL.backup3)," \
224 "256k(NOR.u-boot-spl-os)," \
225 "1m(NOR.u-boot)," \
226 "128k(NOR.u-boot-env)," \
227 "128k(NOR.u-boot-env.backup1)," \
228 "8m(NOR.kernel)," \
229 "-(NOR.rootfs)"
230 #define CONFIG_ENV_OFFSET 0x001c0000
231 #define CONFIG_ENV_OFFSET_REDUND 0x001e0000
232 #endif
233 #endif /* NOR support */
234
235 #endif /* __CONFIG_DRA7XX_EVM_H */