]> git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/ebony.h
3affdd2f668072e4a18eaddfdfd70d0a46dfc261
[people/ms/u-boot.git] / include / configs / ebony.h
1 /*
2 * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23 /************************************************************************
24 * board/config_EBONY.h - configuration for AMCC 440GP Ref (Ebony)
25 ***********************************************************************/
26
27 #ifndef __CONFIG_H
28 #define __CONFIG_H
29
30 /*-----------------------------------------------------------------------
31 * High Level Configuration Options
32 *----------------------------------------------------------------------*/
33 #define CONFIG_EBONY 1 /* Board is ebony */
34 #define CONFIG_440GP 1 /* Specifc GP support */
35 #define CONFIG_440 1 /* ... PPC440 family */
36 #define CONFIG_4xx 1 /* ... PPC4xx family */
37 #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
38 #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
39
40 /*
41 * Include common defines/options for all AMCC eval boards
42 */
43 #define CONFIG_HOSTNAME ebony
44 #include "amcc-common.h"
45
46 /*
47 * Define here the location of the environment variables (FLASH or NVRAM).
48 * Note: DENX encourages to use redundant environment in FLASH. NVRAM is only
49 * supported for backward compatibility.
50 */
51 #if 1
52 #define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
53 #else
54 #define CONFIG_ENV_IS_IN_NVRAM 1 /* use NVRAM for environment vars */
55 #endif
56
57 /*-----------------------------------------------------------------------
58 * Base addresses -- Note these are effective addresses where the
59 * actual resources get mapped (not physical addresses)
60 *----------------------------------------------------------------------*/
61 #define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
62 #define CFG_FLASH_BASE 0xff800000 /* start of FLASH */
63 #define CFG_PCI_MEMBASE 0x80000000 /* mapped pci memory */
64 #define CFG_PERIPHERAL_BASE 0xe0000000 /* internal peripherals */
65 #define CFG_ISRAM_BASE 0xc0000000 /* internal SRAM */
66 #define CFG_PCI_BASE 0xd0000000 /* internal PCI regs */
67
68 #define CFG_NVRAM_BASE_ADDR (CFG_PERIPHERAL_BASE + 0x08000000)
69 #define CFG_FPGA_BASE (CFG_PERIPHERAL_BASE + 0x08300000)
70
71 /*-----------------------------------------------------------------------
72 * Initial RAM & stack pointer (placed in internal SRAM)
73 *----------------------------------------------------------------------*/
74 #define CFG_INIT_RAM_ADDR CFG_ISRAM_BASE /* Initial RAM address */
75 #define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */
76 #define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */
77
78 #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
79 #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
80
81 /*-----------------------------------------------------------------------
82 * Serial Port
83 *----------------------------------------------------------------------*/
84 #undef CONFIG_SERIAL_SOFTWARE_FIFO
85 #define CFG_EXT_SERIAL_CLOCK (1843200 * 6) /* Ext clk @ 11.059 MHz */
86
87 /*-----------------------------------------------------------------------
88 * NVRAM/RTC
89 *
90 * NOTE: Upper 8 bytes of NVRAM is where the RTC registers are located.
91 * The DS1743 code assumes this condition (i.e. -- it assumes the base
92 * address for the RTC registers is:
93 *
94 * CFG_NVRAM_BASE_ADDR + CFG_NVRAM_SIZE
95 *
96 *----------------------------------------------------------------------*/
97 #define CFG_NVRAM_SIZE (0x2000 - 8) /* NVRAM size(8k)- RTC regs */
98 #define CONFIG_RTC_DS174x 1 /* DS1743 RTC */
99
100 #ifdef CONFIG_ENV_IS_IN_NVRAM
101 #define CONFIG_ENV_SIZE 0x1000 /* Size of Environment vars */
102 #define CONFIG_ENV_ADDR \
103 (CFG_NVRAM_BASE_ADDR+CFG_NVRAM_SIZE-CONFIG_ENV_SIZE)
104 #endif /* CONFIG_ENV_IS_IN_NVRAM */
105
106 /*-----------------------------------------------------------------------
107 * FLASH related
108 *----------------------------------------------------------------------*/
109 #define CFG_MAX_FLASH_BANKS 3 /* number of banks */
110 #define CFG_MAX_FLASH_SECT 32 /* sectors per device */
111
112 #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
113 #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
114
115 #define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
116
117 #define CFG_FLASH_ADDR0 0x5555
118 #define CFG_FLASH_ADDR1 0x2aaa
119 #define CFG_FLASH_WORD_SIZE unsigned char
120
121 #ifdef CONFIG_ENV_IS_IN_FLASH
122 #define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
123 #define CONFIG_ENV_ADDR (CFG_MONITOR_BASE-CONFIG_ENV_SECT_SIZE)
124 #define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
125
126 /* Address and size of Redundant Environment Sector */
127 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
128 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
129 #endif /* CONFIG_ENV_IS_IN_FLASH */
130
131 /*-----------------------------------------------------------------------
132 * DDR SDRAM
133 *----------------------------------------------------------------------*/
134 #define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */
135 #define SPD_EEPROM_ADDRESS {0x53,0x52} /* SPD i2c spd addresses */
136 #define CONFIG_PROG_SDRAM_TLB 1 /* setup SDRAM TLB's dynamically*/
137
138 /*-----------------------------------------------------------------------
139 * I2C
140 *----------------------------------------------------------------------*/
141 #define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
142
143 #define CFG_I2C_MULTI_EEPROMS
144 #define CFG_I2C_EEPROM_ADDR (0xa8>>1)
145 #define CFG_I2C_EEPROM_ADDR_LEN 1
146 #define CFG_EEPROM_PAGE_WRITE_ENABLE
147 #define CFG_EEPROM_PAGE_WRITE_BITS 3
148 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
149
150 /*
151 * Default environment variables
152 */
153 #define CONFIG_EXTRA_ENV_SETTINGS \
154 CONFIG_AMCC_DEF_ENV \
155 CONFIG_AMCC_DEF_ENV_POWERPC \
156 CONFIG_AMCC_DEF_ENV_PPC_OLD \
157 CONFIG_AMCC_DEF_ENV_NOR_UPD \
158 "kernel_addr=ff800000\0" \
159 "ramdisk_addr=ff810000\0" \
160 ""
161
162 #define CONFIG_PHY_ADDR 8 /* PHY address */
163 #define CONFIG_HAS_ETH0
164 #define CONFIG_HAS_ETH1
165 #define CONFIG_PHY1_ADDR 9 /* EMAC1 PHY address */
166
167 /*
168 * Commands additional to the ones defined in amcc-common.h
169 */
170 #define CONFIG_CMD_DATE
171 #define CONFIG_CMD_PCI
172 #define CONFIG_CMD_SDRAM
173 #define CONFIG_CMD_SNTP
174
175 /*-----------------------------------------------------------------------
176 * PCI stuff
177 *-----------------------------------------------------------------------
178 */
179 /* General PCI */
180 #define CONFIG_PCI /* include pci support */
181 #define CONFIG_PCI_PNP /* do pci plug-and-play */
182 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
183 #define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
184
185 /* Board-specific PCI */
186 #define CFG_PCI_TARGET_INIT /* let board init pci target */
187
188 #define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
189 #define CFG_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
190
191 #endif /* __CONFIG_H */