include/configs/edb93xx.h

   1 /*
   2  * U-boot - Configuration file for Cirrus Logic EDB93xx boards
   3  */
   4
   5 #ifndef __CONFIG_H
   6 #define __CONFIG_H
   7
   8 #ifdef CONFIG_edb9301
   9 #define CONFIG_EDB9301
  10 #elif defined(CONFIG_edb9302)
  11 #define CONFIG_EDB9302
  12 #elif defined(CONFIG_edb9302a)
  13 #define CONFIG_EDB9302A
  14 #elif defined(CONFIG_edb9307)
  15 #define CONFIG_EDB9307
  16 #elif defined(CONFIG_edb9307a)
  17 #define CONFIG_EDB9307A
  18 #elif defined(CONFIG_edb9312)
  19 #define CONFIG_EDB9312
  20 #elif defined(CONFIG_edb9315)
  21 #define CONFIG_EDB9315
  22 #elif defined(CONFIG_edb9315a)
  23 #define CONFIG_EDB9315A
  24 #else
  25 #error "no board defined"
  26 #endif
  27
  28 /* Initial environment and monitor configuration options. */
  29 #define CONFIG_BOOTDELAY                2
  30 #define CONFIG_CMDLINE_TAG              1
  31 #define CONFIG_INITRD_TAG               1
  32 #define CONFIG_SETUP_MEMORY_TAGS        1
  33 #define CONFIG_BOOTARGS         "root=/dev/nfs console=ttyAM0,115200 ip=dhcp"
  34 #define CONFIG_BOOTFILE         "edb93xx.img"
  35
  36 #define CONFIG_SYS_HUSH_PARSER          1
  37 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
  38
  39 #ifdef CONFIG_EDB9301
  40 #define CONFIG_EP9301
  41 #define CONFIG_MACH_TYPE                MACH_TYPE_EDB9301
  42 #define CONFIG_SYS_PROMPT               "EDB9301> "
  43 #define CONFIG_ENV_SECT_SIZE            0x00020000
  44 #elif defined(CONFIG_EDB9302)
  45 #define CONFIG_EP9302
  46 #define CONFIG_MACH_TYPE                MACH_TYPE_EDB9302
  47 #define CONFIG_SYS_PROMPT               "EDB9302> "
  48 #define CONFIG_ENV_SECT_SIZE            0x00020000
  49 #elif defined(CONFIG_EDB9302A)
  50 #define CONFIG_EP9302
  51 #define CONFIG_MACH_TYPE                MACH_TYPE_EDB9302A
  52 #define CONFIG_SYS_PROMPT               "EDB9302A> "
  53 #define CONFIG_ENV_SECT_SIZE            0x00020000
  54 #elif defined(CONFIG_EDB9307)
  55 #define CONFIG_EP9307
  56 #define CONFIG_MACH_TYPE                MACH_TYPE_EDB9307
  57 #define CONFIG_SYS_PROMPT               "EDB9307> "
  58 #define CONFIG_ENV_SECT_SIZE            0x00040000
  59 #elif defined(CONFIG_EDB9307A)
  60 #define CONFIG_EP9307
  61 #define CONFIG_MACH_TYPE                MACH_TYPE_EDB9307A
  62 #define CONFIG_SYS_PROMPT               "EDB9307A> "
  63 #define CONFIG_ENV_SECT_SIZE            0x00040000
  64 #elif defined(CONFIG_EDB9312)
  65 #define CONFIG_EP9312
  66 #define CONFIG_MACH_TYPE                MACH_TYPE_EDB9312
  67 #define CONFIG_SYS_PROMPT               "EDB9312> "
  68 #define CONFIG_ENV_SECT_SIZE            0x00040000
  69 #elif defined(CONFIG_EDB9315)
  70 #define CONFIG_EP9315
  71 #define CONFIG_MACH_TYPE                MACH_TYPE_EDB9315
  72 #define CONFIG_SYS_PROMPT               "EDB9315> "
  73 #define CONFIG_ENV_SECT_SIZE            0x00040000
  74 #elif defined(CONFIG_EDB9315A)
  75 #define CONFIG_EP9315
  76 #define CONFIG_MACH_TYPE                MACH_TYPE_EDB9315A
  77 #define CONFIG_SYS_PROMPT               "EDB9315A> "
  78 #define CONFIG_ENV_SECT_SIZE            0x00040000
  79 #else
  80 #error "no board defined"
  81 #endif
  82
  83 /* High-level configuration options */
  84 #define CONFIG_ARM920T          1               /* This is an ARM920T core... */
  85 #define CONFIG_EP93XX           1               /* in a Cirrus Logic 93xx SoC */
  86
  87 #define CONFIG_SYS_CLK_FREQ     14745600        /* EP93xx has a 14.7456 clock */
  88 #define CONFIG_SYS_HZ           1000            /* decr freq: 1 ms ticks      */
  89 #undef  CONFIG_USE_IRQ                          /* Don't need IRQ/FIQ         */
  90
  91 /* Monitor configuration */
  92 #include <config_cmd_default.h>
  93 #undef CONFIG_CMD_FPGA
  94 #undef CONFIG_CMD_SETGETDCR
  95 #undef CONFIG_CMD_XIMG
  96
  97 #undef CONFIG_CMD_DATE
  98 #define CONFIG_CMD_DHCP
  99 #define CONFIG_CMD_FAT
 100 #define CONFIG_CMD_JFFS2
 101
 102 #define CONFIG_SYS_LONGHELP                     /* Enable "long" help in mon */
 103 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O buffer size */
 104 /* Print buffer size */
 105 #define CONFIG_SYS_PBSIZE       (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 106 /* Boot argument buffer size */
 107 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE
 108 #define CONFIG_SYS_MAXARGS      16              /* Max number of command args */
 109
 110 /* Serial port hardware configuration */
 111 #define CONFIG_PL010_SERIAL
 112 #define CONFIG_CONS_INDEX               0
 113 #define CONFIG_BAUDRATE                 115200
 114 #define CONFIG_SYS_BAUDRATE_TABLE       {9600, 19200, 38400, 57600, 115200}
 115 #define CONFIG_SYS_SERIAL0              0x808C0000
 116 #define CONFIG_SYS_SERIAL1              0x808D0000
 117 #define CONFIG_PL01x_PORTS      {(void *)CONFIG_SYS_SERIAL0, \
 118                         (void *)CONFIG_SYS_SERIAL1}
 119
 120 /* Status LED */
 121 #define CONFIG_STATUS_LED               1 /* Status LED enabled */
 122 #define CONFIG_BOARD_SPECIFIC_LED       1
 123 #define STATUS_LED_GREEN                0
 124 #define STATUS_LED_RED                  1
 125 /* Green */
 126 #define STATUS_LED_BIT                  STATUS_LED_GREEN
 127 #define STATUS_LED_STATE                STATUS_LED_ON
 128 #define STATUS_LED_PERIOD               (CONFIG_SYS_HZ / 2)
 129 /* Red */
 130 #define STATUS_LED_BIT1                 STATUS_LED_RED
 131 #define STATUS_LED_STATE1               STATUS_LED_OFF
 132 #define STATUS_LED_PERIOD1              (CONFIG_SYS_HZ / 2)
 133 /* Optional value */
 134 #define STATUS_LED_BOOT                 STATUS_LED_BIT
 135
 136 /* Network hardware configuration */
 137 #define CONFIG_DRIVER_EP93XX_MAC
 138 #define CONFIG_MII_SUPPRESS_PREAMBLE
 139 #define CONFIG_MII
 140 #define CONFIG_PHY_ADDR         1
 141 #define CONFIG_NET_MULTI
 142 #undef  CONFIG_NETCONSOLE
 143
 144 /* SDRAM configuration */
 145 #if defined(CONFIG_EDB9301) || defined(CONFIG_EDB9302)
 146 /*
 147  * EDB9301/2 has 4 banks of SDRAM consisting of 1x Samsung K4S561632E-TC75
 148  * 256 Mbit SDRAM on a 16-bit data bus, for a total of 32MB of SDRAM. We set
 149  * the SROMLL bit on the processor, resulting in this non-contiguous memory map.
 150  */
 151 #define CONFIG_NR_DRAM_BANKS            4
 152 #define PHYS_SDRAM_1                    0x00000000
 153 #define PHYS_SDRAM_SIZE_1               0x00800000
 154 #define PHYS_SDRAM_2                    0x01000000
 155 #define PHYS_SDRAM_SIZE_2               0x00800000
 156 #define PHYS_SDRAM_3                    0x04000000
 157 #define PHYS_SDRAM_SIZE_3               0x00800000
 158 #define PHYS_SDRAM_4                    0x05000000
 159 #define PHYS_SDRAM_SIZE_4               0x00800000
 160 #define CONFIG_EDB93XX_SDCS3
 161 #define CONFIG_SYS_MEMTEST_START        0x00100000
 162 #define CONFIG_SYS_MEMTEST_END          0x007fffff
 163
 164 #elif defined(CONFIG_EDB9302A)
 165 /*
 166  * EDB9302a has 4 banks of SDRAM consisting of 1x Samsung K4S561632E-TC75
 167  * 256 Mbit SDRAM on a 16-bit data bus, for a total of 32MB of SDRAM. We set
 168  * the SROMLL bit on the processor, resulting in this non-contiguous memory map.
 169  */
 170 #define CONFIG_NR_DRAM_BANKS            4
 171 #define PHYS_SDRAM_1                    0xc0000000
 172 #define PHYS_SDRAM_SIZE_1               0x00800000
 173 #define PHYS_SDRAM_2                    0xc1000000
 174 #define PHYS_SDRAM_SIZE_2               0x00800000
 175 #define PHYS_SDRAM_3                    0xc4000000
 176 #define PHYS_SDRAM_SIZE_3               0x00800000
 177 #define PHYS_SDRAM_4                    0xc5000000
 178 #define PHYS_SDRAM_SIZE_4               0x00800000
 179 #define CONFIG_EDB93XX_SDCS0
 180 #define CONFIG_SYS_MEMTEST_START        0xc0100000
 181 #define CONFIG_SYS_MEMTEST_END          0xc07fffff
 182
 183 #elif defined(CONFIG_EDB9307) || defined CONFIG_EDB9312 || \
 184         defined(CONFIG_EDB9315)
 185 /*
 186  * The EDB9307, EDB9312, and EDB9315 have 2 banks of SDRAM consisting of
 187  * 2x Samsung K4S561632E-TC75 256 Mbit on a 32-bit data bus, for a total of
 188  * 64 MB of SDRAM.
 189  */
 190 #define CONFIG_NR_DRAM_BANKS            2
 191 #define PHYS_SDRAM_1                    0x00000000
 192 #define PHYS_SDRAM_SIZE_1               0x02000000
 193 #define PHYS_SDRAM_2                    0x04000000
 194 #define PHYS_SDRAM_SIZE_2               0x02000000
 195 #define CONFIG_EDB93XX_SDCS3
 196 #define CONFIG_SYS_MEMTEST_START        0x00100000
 197 #define CONFIG_SYS_MEMTEST_END          0x01e00000
 198
 199 #elif defined(CONFIG_EDB9307A) || defined(CONFIG_EDB9315A)
 200 /*
 201  * The EDB9307A and EDB9315A have 2 banks of SDRAM consisting of 2x Samsung
 202  * K4S561632E-TC75 256 Mbit on a 32-bit data bus, for a total of 64 MB of SDRAM.
 203  */
 204 #define CONFIG_NR_DRAM_BANKS            2
 205 #define PHYS_SDRAM_1                    0xc0000000
 206 #define PHYS_SDRAM_SIZE_1               0x02000000
 207 #define PHYS_SDRAM_2                    0xc4000000
 208 #define PHYS_SDRAM_SIZE_2               0x02000000
 209 #define CONFIG_EDB93XX_SDCS0
 210 #define CONFIG_SYS_MEMTEST_START        0xc0100000
 211 #define CONFIG_SYS_MEMTEST_END          0xc1e00000
 212 #endif
 213
 214 /* Default load address */
 215 #define CONFIG_SYS_LOAD_ADDR   (PHYS_SDRAM_1 + 0x01000000)
 216
 217 /* Must match kernel config */
 218 #define LINUX_BOOT_PARAM_ADDR   (PHYS_SDRAM_1 + 0x100)
 219
 220 /* Run-time memory allocatons */
 221 #define CONFIG_SYS_GBL_DATA_SIZE        128
 222 #define CONFIG_STACKSIZE                (128 * 1024)
 223
 224 #if defined(CONFIG_USE_IRQ)
 225 #define CONFIG_STACKSIZE_IRQ    (4 * 1024)
 226 #define CONFIG_STACKSIZE_FIQ    (4 * 1024)
 227 #endif
 228
 229 #define CONFIG_SYS_MALLOC_LEN           (512 * 1024)
 230
 231 /* -----------------------------------------------------------------------------
 232  * FLASH and environment organization
 233  *
 234  * The EDB9301 and EDB9302(a) have 1 bank of flash memory at 0x60000000
 235  * consisting of 1x Intel TE28F128J3C-150 128 Mbit flash on a 16-bit data bus,
 236  * for a total of 16 MB of CFI-compatible flash.
 237  *
 238  * The EDB9307(a), EDB9312, and EDB9315(a) have 1 bank of flash memory at
 239  * 0x60000000 consisting of 2x Micron MT28F128J3-12 128 Mbit flash on a 32-bit
 240  * data bus, for a total of 32 MB of CFI-compatible flash.
 241  *
 242  *                            EDB9301/02(a)          EDB9307(a)/12/15(a)
 243  * 0x60000000 - 0x0003FFFF    u-boot                 u-boot
 244  * 0x60040000 - 0x0005FFFF    environment #1         environment #1
 245  * 0x60060000 - 0x0007FFFF    environment #2         environment #1 (continued)
 246  * 0x60080000 - 0x0009FFFF    unused                 environment #2
 247  * 0x600A0000 - 0x000BFFFF    unused                 environment #2 (continued)
 248  * 0x600C0000 - 0x00FFFFFF    unused                 unused
 249  * 0x61000000 - 0x01FFFFFF    not present            unused
 250  */
 251 #define CONFIG_SYS_FLASH_CFI
 252 #define CONFIG_FLASH_CFI_DRIVER
 253 #define CONFIG_SYS_MAX_FLASH_BANKS      1
 254 #define CONFIG_SYS_MAX_FLASH_SECT       128
 255
 256 #define PHYS_FLASH_1                    0x60000000
 257 #define CONFIG_SYS_FLASH_BASE           (PHYS_FLASH_1)
 258 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 259 #define CONFIG_SYS_MONITOR_LEN          (256 * 1024)
 260
 261 #define CONFIG_ENV_OVERWRITE            /* Vendor params unprotected */
 262 #define CONFIG_ENV_IS_IN_FLASH
 263 #define CONFIG_ENV_ADDR                 0x60040000
 264
 265 #define CONFIG_ENV_ADDR_REDUND          (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
 266
 267 #define CONFIG_ENV_SIZE                 CONFIG_ENV_SECT_SIZE
 268 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
 269
 270 #endif /* !defined (__CONFIG_H) */