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1 /*
2 * (C) Copyright 2011
3 * egnite GmbH <info@egnite.de>
4 *
5 * Configuation settings for Ethernut 5 with AT91SAM9XE.
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12
13 #include <asm/hardware.h>
14
15
16 /* The first stage boot loader expects u-boot running at this address. */
17 #define CONFIG_SYS_TEXT_BASE 0x27000000 /* 16MB available */
18
19 /* The first stage boot loader takes care of low level initialization. */
20 #define CONFIG_SKIP_LOWLEVEL_INIT
21
22 /* Set our official architecture number. */
23 #define MACH_TYPE_ETHERNUT5 1971
24 #define CONFIG_MACH_TYPE MACH_TYPE_ETHERNUT5
25
26 /* CPU information */
27 #define CONFIG_DISPLAY_CPUINFO /* Display at console. */
28 #define CONFIG_ARCH_CPU_INIT
29
30 /* ARM asynchronous clock */
31 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
32 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
33
34 /* 32kB internal SRAM */
35 #define CONFIG_SRAM_BASE 0x00300000 /*AT91SAM9XE_SRAM_BASE */
36 #define CONFIG_SRAM_SIZE (32 << 10)
37 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SRAM_BASE + CONFIG_SRAM_SIZE - \
38 GENERATED_GBL_DATA_SIZE)
39
40 /* 128MB SDRAM in 1 bank */
41 #define CONFIG_NR_DRAM_BANKS 1
42 #define CONFIG_SYS_SDRAM_BASE 0x20000000
43 #define CONFIG_SYS_SDRAM_SIZE (128 << 20)
44 #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
45 #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
46 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
47 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
48 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE \
49 - CONFIG_SYS_MALLOC_LEN)
50
51 /* 512kB on-chip NOR flash */
52 # define CONFIG_SYS_MAX_FLASH_BANKS 1
53 # define CONFIG_SYS_FLASH_BASE 0x00200000 /* AT91SAM9XE_FLASH_BASE */
54 # define CONFIG_AT91_EFLASH
55 # define CONFIG_SYS_MAX_FLASH_SECT 32
56 # define CONFIG_SYS_FLASH_PROTECTION /* First stage loader in sector 0 */
57 # define CONFIG_EFLASH_PROTSECTORS 1
58
59 /* 512kB DataFlash at NPCS0 */
60 #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
61 #define CONFIG_HAS_DATAFLASH
62 #define CONFIG_ATMEL_DATAFLASH_SPI
63 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000
64 #define DATAFLASH_TCSS (0x1a << 16)
65 #define DATAFLASH_TCHS (0x1 << 24)
66
67 #define CONFIG_ENV_IS_IN_SPI_FLASH
68 #define CONFIG_ENV_OFFSET 0x3DE000
69 #define CONFIG_ENV_SECT_SIZE (132 << 10)
70 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
71 #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 \
72 + CONFIG_ENV_OFFSET)
73 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 \
74 + 0x042000)
75
76 /* SPI */
77 #define CONFIG_ATMEL_SPI
78 #define AT91_SPI_CLK 15000000
79
80 /* Serial port */
81 #define CONFIG_ATMEL_USART
82 #define CONFIG_USART3 /* USART 3 is DBGU */
83 #define CONFIG_BAUDRATE 115200
84 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
85 #define CONFIG_USART_ID ATMEL_ID_SYS
86
87 /* Misc. hardware drivers */
88 #define CONFIG_AT91_GPIO
89
90 /* Command line configuration */
91 #define CONFIG_CMD_JFFS2
92 #define CONFIG_CMD_MII
93 #define CONFIG_CMD_MTDPARTS
94 #define CONFIG_CMD_NAND
95
96 #ifndef MINIMAL_LOADER
97 #define CONFIG_CMD_ASKENV
98 #define CONFIG_CMD_BSP
99 #define CONFIG_CMD_CACHE
100 #define CONFIG_CMD_DATE
101 #define CONFIG_CMD_EXT2
102 #define CONFIG_CMD_FAT
103 #define CONFIG_CMD_MMC
104 #define CONFIG_CMD_REISER
105 #define CONFIG_CMD_SAVES
106 #define CONFIG_CMD_UBI
107 #define CONFIG_CMD_UBIFS
108 #define CONFIG_CMD_UNZIP
109 #endif
110
111 /* NAND flash */
112 #ifdef CONFIG_CMD_NAND
113 #define CONFIG_SYS_MAX_NAND_DEVICE 1
114 #define CONFIG_SYS_NAND_BASE 0x40000000
115 #define CONFIG_SYS_NAND_DBW_8
116 #define CONFIG_NAND_ATMEL
117 /* our ALE is AD21 */
118 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
119 /* our CLE is AD22 */
120 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
121 #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PC(14)
122 #endif
123
124 /* JFFS2 */
125 #ifdef CONFIG_CMD_JFFS2
126 #define CONFIG_JFFS2_CMDLINE
127 #define CONFIG_JFFS2_NAND
128 #endif
129
130 /* Ethernet */
131 #define CONFIG_NET_RETRY_COUNT 20
132 #define CONFIG_MACB
133 #define CONFIG_RMII
134 #define CONFIG_PHY_ID 0
135 #define CONFIG_MACB_SEARCH_PHY
136
137 /* MMC */
138 #ifdef CONFIG_CMD_MMC
139 #define CONFIG_MMC
140 #define CONFIG_GENERIC_MMC
141 #define CONFIG_GENERIC_ATMEL_MCI
142 #define CONFIG_SYS_MMC_CD_PIN AT91_PIO_PORTC, 8
143 #endif
144
145 /* USB */
146 #ifdef CONFIG_CMD_USB
147 #define CONFIG_USB_ATMEL
148 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
149 #define CONFIG_USB_OHCI_NEW
150 #define CONFIG_SYS_USB_OHCI_CPU_INIT
151 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
152 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "host"
153 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
154 #define CONFIG_USB_STORAGE
155 #endif
156
157 /* RTC */
158 #if defined(CONFIG_CMD_DATE) || defined(CONFIG_CMD_SNTP)
159 #define CONFIG_RTC_PCF8563
160 #define CONFIG_SYS_I2C_RTC_ADDR 0x51
161 #endif
162
163 /* I2C */
164 #define CONFIG_SYS_MAX_I2C_BUS 1
165
166 #define CONFIG_SYS_I2C
167 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
168 #define CONFIG_SYS_I2C_SOFT_SPEED 100000
169 #define CONFIG_SYS_I2C_SOFT_SLAVE 0
170
171 #define I2C_SOFT_DECLARATIONS
172
173 #define GPIO_I2C_SCL AT91_PIO_PORTA, 24
174 #define GPIO_I2C_SDA AT91_PIO_PORTA, 23
175
176 #define I2C_INIT { \
177 at91_set_pio_periph(AT91_PIO_PORTA, 23, 0); \
178 at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1); \
179 at91_set_pio_periph(AT91_PIO_PORTA, 24, 0); \
180 at91_set_pio_output(AT91_PIO_PORTA, 24, 0); \
181 at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1); \
182 }
183
184 #define I2C_ACTIVE at91_set_pio_output(AT91_PIO_PORTA, 23, 0)
185 #define I2C_TRISTATE at91_set_pio_input(AT91_PIO_PORTA, 23, 0)
186 #define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTA, 24, bit)
187 #define I2C_SDA(bit) at91_set_pio_value(AT91_PIO_PORTA, 23, bit)
188 #define I2C_DELAY udelay(100)
189 #define I2C_READ at91_get_pio_value(AT91_PIO_PORTA, 23)
190
191 /* DHCP/BOOTP options */
192 #ifdef CONFIG_CMD_DHCP
193 #define CONFIG_BOOTP_BOOTFILESIZE
194 #define CONFIG_BOOTP_BOOTPATH
195 #define CONFIG_BOOTP_GATEWAY
196 #define CONFIG_BOOTP_HOSTNAME
197 #define CONFIG_SYS_AUTOLOAD "n"
198 #endif
199
200 /* File systems */
201 #define CONFIG_MTD_DEVICE
202 #define CONFIG_MTD_PARTITIONS
203 #if defined(CONFIG_CMD_MTDPARTS) || defined(CONFIG_CMD_NAND)
204 #define MTDIDS_DEFAULT "nand0=atmel_nand"
205 #define MTDPARTS_DEFAULT "mtdparts=atmel_nand:-(root)"
206 #endif
207 #if defined(CONFIG_CMD_REISER) || defined(CONFIG_CMD_EXT2) || \
208 defined(CONFIG_CMD_USB) || defined(CONFIG_MMC)
209 #define CONFIG_DOS_PARTITION
210 #endif
211 #define CONFIG_LZO
212 #define CONFIG_RBTREE
213
214 /* Boot command */
215 #define CONFIG_BOOTDELAY 3
216 #define CONFIG_CMDLINE_TAG
217 #define CONFIG_SETUP_MEMORY_TAGS
218 #define CONFIG_INITRD_TAG
219 #define CONFIG_BOOTCOMMAND "cp.b 0xC00C6000 ${loadaddr} 0x294000; bootm"
220 #if defined(CONFIG_CMD_NAND)
221 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
222 "root=/dev/mtdblock0 " \
223 MTDPARTS_DEFAULT \
224 " rw rootfstype=jffs2"
225 #endif
226
227 /* Misc. u-boot settings */
228 #define CONFIG_SYS_CBSIZE 256
229 #define CONFIG_SYS_MAXARGS 16
230 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + 16 \
231 + sizeof(CONFIG_SYS_PROMPT))
232 #define CONFIG_SYS_LONGHELP
233 #define CONFIG_CMDLINE_EDITING
234
235 #endif