include/configs/ethernut5.h

   1 /*
   2  * (C) Copyright 2011
   3  * egnite GmbH <info@egnite.de>
   4  *
   5  * Configuation settings for Ethernut 5 with AT91SAM9XE.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #ifndef __CONFIG_H
  11 #define __CONFIG_H
  12
  13 #include <asm/hardware.h>
  14
  15 /* The first stage boot loader expects u-boot running at this address. */
  16 #define CONFIG_SYS_TEXT_BASE    0x27000000      /* 16MB available */
  17
  18 /* The first stage boot loader takes care of low level initialization. */
  19 #define CONFIG_SKIP_LOWLEVEL_INIT
  20
  21 /* Set our official architecture number. */
  22 #define MACH_TYPE_ETHERNUT5 1971
  23 #define CONFIG_MACH_TYPE MACH_TYPE_ETHERNUT5
  24
  25 /* CPU information */
  26 #define CONFIG_ARCH_CPU_INIT
  27
  28 /* ARM asynchronous clock */
  29 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768   /* slow clock xtal */
  30 #define CONFIG_SYS_AT91_MAIN_CLOCK      18432000 /* 18.432 MHz crystal */
  31
  32 /* 32kB internal SRAM */
  33 #define CONFIG_SRAM_BASE        0x00300000 /*AT91SAM9XE_SRAM_BASE */
  34 #define CONFIG_SRAM_SIZE        (32 << 10)
  35 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SRAM_BASE + CONFIG_SRAM_SIZE - \
  36                                 GENERATED_GBL_DATA_SIZE)
  37
  38 /* 128MB SDRAM in 1 bank */
  39 #define CONFIG_NR_DRAM_BANKS            1
  40 #define CONFIG_SYS_SDRAM_BASE           0x20000000
  41 #define CONFIG_SYS_SDRAM_SIZE           (128 << 20)
  42 #define CONFIG_SYS_LOAD_ADDR            CONFIG_SYS_SDRAM_BASE
  43 #define CONFIG_LOADADDR                 CONFIG_SYS_LOAD_ADDR
  44 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (1 << 20))
  45 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
  46 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_TEXT_BASE \
  47                                         - CONFIG_SYS_MALLOC_LEN)
  48
  49 /* 512kB on-chip NOR flash */
  50 # define CONFIG_SYS_MAX_FLASH_BANKS     1
  51 # define CONFIG_SYS_FLASH_BASE          0x00200000 /* AT91SAM9XE_FLASH_BASE */
  52 # define CONFIG_AT91_EFLASH
  53 # define CONFIG_SYS_MAX_FLASH_SECT      32
  54 # define CONFIG_SYS_FLASH_PROTECTION    /* First stage loader in sector 0 */
  55 # define CONFIG_EFLASH_PROTSECTORS      1
  56
  57 /* 512kB DataFlash at NPCS0 */
  58 #define CONFIG_SYS_MAX_DATAFLASH_BANKS  1
  59 #define CONFIG_HAS_DATAFLASH
  60 #define CONFIG_ATMEL_DATAFLASH_SPI
  61 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0     0xC0000000
  62 #define DATAFLASH_TCSS                  (0x1a << 16)
  63 #define DATAFLASH_TCHS                  (0x1 << 24)
  64
  65 #define CONFIG_ENV_IS_IN_SPI_FLASH
  66 #define CONFIG_ENV_OFFSET               0x3DE000
  67 #define CONFIG_ENV_SECT_SIZE            (132 << 10)
  68 #define CONFIG_ENV_SIZE                 CONFIG_ENV_SECT_SIZE
  69 #define CONFIG_ENV_ADDR                 (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 \
  70                                         + CONFIG_ENV_OFFSET)
  71 #define CONFIG_SYS_MONITOR_BASE         (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 \
  72                                         + 0x042000)
  73
  74 /* SPI */
  75 #define CONFIG_ATMEL_SPI
  76 #define AT91_SPI_CLK                    15000000
  77
  78 /* Serial port */
  79 #define CONFIG_ATMEL_USART
  80 #define CONFIG_USART3                   /* USART 3 is DBGU */
  81 #define CONFIG_BAUDRATE                 115200
  82 #define CONFIG_USART_BASE               ATMEL_BASE_DBGU
  83 #define CONFIG_USART_ID                 ATMEL_ID_SYS
  84
  85 /* Misc. hardware drivers */
  86 #define CONFIG_AT91_GPIO
  87
  88 /* Command line configuration */
  89 #define CONFIG_CMD_JFFS2
  90 #define CONFIG_CMD_MTDPARTS
  91 #define CONFIG_CMD_NAND
  92
  93 #ifndef MINIMAL_LOADER
  94 #define CONFIG_CMD_BSP
  95 #define CONFIG_CMD_DATE
  96 #define CONFIG_CMD_REISER
  97 #define CONFIG_CMD_SAVES
  98 #define CONFIG_CMD_UBIFS
  99 #define CONFIG_CMD_UNZIP
 100 #endif
 101
 102 /* NAND flash */
 103 #ifdef CONFIG_CMD_NAND
 104 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 105 #define CONFIG_SYS_NAND_BASE            0x40000000
 106 #define CONFIG_SYS_NAND_DBW_8
 107 #define CONFIG_NAND_ATMEL
 108 /* our ALE is AD21 */
 109 #define CONFIG_SYS_NAND_MASK_ALE        (1 << 21)
 110 /* our CLE is AD22 */
 111 #define CONFIG_SYS_NAND_MASK_CLE        (1 << 22)
 112 #define CONFIG_SYS_NAND_ENABLE_PIN      GPIO_PIN_PC(14)
 113 #endif
 114
 115 /* JFFS2 */
 116 #ifdef CONFIG_CMD_JFFS2
 117 #define CONFIG_JFFS2_CMDLINE
 118 #define CONFIG_JFFS2_NAND
 119 #endif
 120
 121 /* Ethernet */
 122 #define CONFIG_NET_RETRY_COUNT          20
 123 #define CONFIG_MACB
 124 #define CONFIG_RMII
 125 #define CONFIG_PHY_ID                   0
 126 #define CONFIG_MACB_SEARCH_PHY
 127
 128 /* MMC */
 129 #ifdef CONFIG_CMD_MMC
 130 #define CONFIG_MMC
 131 #define CONFIG_GENERIC_MMC
 132 #define CONFIG_GENERIC_ATMEL_MCI
 133 #define CONFIG_SYS_MMC_CD_PIN           AT91_PIO_PORTC, 8
 134 #endif
 135
 136 /* USB */
 137 #ifdef CONFIG_CMD_USB
 138 #define CONFIG_USB_ATMEL
 139 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
 140 #define CONFIG_USB_OHCI_NEW
 141 #define CONFIG_SYS_USB_OHCI_CPU_INIT
 142 #define CONFIG_SYS_USB_OHCI_REGS_BASE   0x00500000
 143 #define CONFIG_SYS_USB_OHCI_SLOT_NAME   "host"
 144 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      2
 145 #endif
 146
 147 /* RTC */
 148 #if defined(CONFIG_CMD_DATE) || defined(CONFIG_CMD_SNTP)
 149 #define CONFIG_RTC_PCF8563
 150 #define CONFIG_SYS_I2C_RTC_ADDR         0x51
 151 #endif
 152
 153 /* I2C */
 154 #define CONFIG_SYS_MAX_I2C_BUS  1
 155
 156 #define CONFIG_SYS_I2C
 157 #define CONFIG_SYS_I2C_SOFT                     /* I2C bit-banged */
 158 #define CONFIG_SYS_I2C_SOFT_SPEED       100000
 159 #define CONFIG_SYS_I2C_SOFT_SLAVE       0
 160
 161 #define I2C_SOFT_DECLARATIONS
 162
 163 #define GPIO_I2C_SCL            AT91_PIO_PORTA, 24
 164 #define GPIO_I2C_SDA            AT91_PIO_PORTA, 23
 165
 166 #define I2C_INIT { \
 167         at91_set_pio_periph(AT91_PIO_PORTA, 23, 0); \
 168         at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1); \
 169         at91_set_pio_periph(AT91_PIO_PORTA, 24, 0); \
 170         at91_set_pio_output(AT91_PIO_PORTA, 24, 0); \
 171         at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1); \
 172 }
 173
 174 #define I2C_ACTIVE      at91_set_pio_output(AT91_PIO_PORTA, 23, 0)
 175 #define I2C_TRISTATE    at91_set_pio_input(AT91_PIO_PORTA, 23, 0)
 176 #define I2C_SCL(bit)    at91_set_pio_value(AT91_PIO_PORTA, 24, bit)
 177 #define I2C_SDA(bit)    at91_set_pio_value(AT91_PIO_PORTA, 23, bit)
 178 #define I2C_DELAY       udelay(100)
 179 #define I2C_READ        at91_get_pio_value(AT91_PIO_PORTA, 23)
 180
 181 /* DHCP/BOOTP options */
 182 #ifdef CONFIG_CMD_DHCP
 183 #define CONFIG_BOOTP_BOOTFILESIZE
 184 #define CONFIG_BOOTP_BOOTPATH
 185 #define CONFIG_BOOTP_GATEWAY
 186 #define CONFIG_BOOTP_HOSTNAME
 187 #define CONFIG_SYS_AUTOLOAD     "n"
 188 #endif
 189
 190 /* File systems */
 191 #define CONFIG_MTD_DEVICE
 192 #define CONFIG_MTD_PARTITIONS
 193 #if defined(CONFIG_CMD_MTDPARTS) || defined(CONFIG_CMD_NAND)
 194 #define MTDIDS_DEFAULT          "nand0=atmel_nand"
 195 #define MTDPARTS_DEFAULT        "mtdparts=atmel_nand:-(root)"
 196 #endif
 197 #if defined(CONFIG_CMD_REISER) || defined(CONFIG_CMD_EXT2) || \
 198         defined(CONFIG_CMD_USB) || defined(CONFIG_MMC)
 199 #define CONFIG_DOS_PARTITION
 200 #endif
 201 #define CONFIG_LZO
 202 #define CONFIG_RBTREE
 203
 204 /* Boot command */
 205 #define CONFIG_CMDLINE_TAG
 206 #define CONFIG_SETUP_MEMORY_TAGS
 207 #define CONFIG_INITRD_TAG
 208 #define CONFIG_BOOTCOMMAND      "cp.b 0xC00C6000 ${loadaddr} 0x294000; bootm"
 209 #if defined(CONFIG_CMD_NAND)
 210 #define CONFIG_BOOTARGS         "console=ttyS0,115200 " \
 211                                 "root=/dev/mtdblock0 " \
 212                                 MTDPARTS_DEFAULT \
 213                                 " rw rootfstype=jffs2"
 214 #endif
 215
 216 /* Misc. u-boot settings */
 217 #define CONFIG_SYS_CBSIZE               256
 218 #define CONFIG_SYS_MAXARGS              16
 219 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + 16 \
 220                                         + sizeof(CONFIG_SYS_PROMPT))
 221 #define CONFIG_SYS_LONGHELP
 222 #define CONFIG_CMDLINE_EDITING
 223
 224 #endif