include/configs/favr-32-ezkit.h

   1 /*
   2  * Copyright (C) 2008 Atmel Corporation
   3  *
   4  * Configuration settings for the Favr-32 EarthLCD LCD kit.
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8 #ifndef __CONFIG_H
   9 #define __CONFIG_H
  10
  11 #include <asm/arch/hardware.h>
  12
  13 #define CONFIG_AVR32
  14 #define CONFIG_AT32AP
  15 #define CONFIG_AT32AP7000
  16 #define CONFIG_FAVR32_EZKIT
  17
  18 #define CONFIG_FAVR32_EZKIT_EXT_FLASH
  19
  20 /*
  21  * Timer clock frequency. We're using the CPU-internal COUNT register
  22  * for this, so this is equivalent to the CPU core clock frequency
  23  */
  24 #define CONFIG_SYS_HZ                           1000
  25
  26 /*
  27  * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
  28  * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
  29  * PLL frequency.
  30  * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
  31  */
  32 #define CONFIG_PLL
  33 #define CONFIG_SYS_POWER_MANAGER
  34 #define CONFIG_SYS_OSC0_HZ                      20000000
  35 #define CONFIG_SYS_PLL0_DIV                     1
  36 #define CONFIG_SYS_PLL0_MUL                     7
  37 #define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16
  38 /*
  39  * Set the CPU running at:
  40  * PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz
  41  */
  42 #define CONFIG_SYS_CLKDIV_CPU                   0
  43 /*
  44  * Set the HSB running at:
  45  * PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz
  46  */
  47 #define CONFIG_SYS_CLKDIV_HSB                   1
  48 /*
  49  * Set the PBA running at:
  50  * PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz
  51  */
  52 #define CONFIG_SYS_CLKDIV_PBA                   2
  53 /*
  54  * Set the PBB running at:
  55  * PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz
  56  */
  57 #define CONFIG_SYS_CLKDIV_PBB                   1
  58
  59 /* Reserve VM regions for SDRAM and NOR flash */
  60 #define CONFIG_SYS_NR_VM_REGIONS                2
  61
  62 /*
  63  * The PLLOPT register controls the PLL like this:
  64  *   icp = PLLOPT<2>
  65  *   ivco = PLLOPT<1:0>
  66  *
  67  * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
  68  */
  69 #define CONFIG_SYS_PLL0_OPT                     0x04
  70
  71 #define CONFIG_USART_BASE               ATMEL_BASE_USART3
  72 #define CONFIG_USART_ID                 3
  73
  74 /* User serviceable stuff */
  75 #define CONFIG_DOS_PARTITION
  76
  77 #define CONFIG_CMDLINE_TAG
  78 #define CONFIG_SETUP_MEMORY_TAGS
  79 #define CONFIG_INITRD_TAG
  80
  81 #define CONFIG_STACKSIZE                (2048)
  82
  83 #define CONFIG_BAUDRATE                 115200
  84 #define CONFIG_BOOTARGS                                                 \
  85         "root=/dev/mtdblock1 rootfstype=jffs fbmem=1800k"
  86
  87 #define CONFIG_BOOTCOMMAND                                              \
  88         "fsload; bootm $(fileaddr)"
  89
  90 /*
  91  * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
  92  * data on the serial line may interrupt the boot sequence.
  93  */
  94 #define CONFIG_BOOTDELAY                1
  95 #define CONFIG_AUTOBOOT
  96 #define CONFIG_AUTOBOOT_KEYED
  97 #define CONFIG_AUTOBOOT_PROMPT          \
  98         "Press SPACE to abort autoboot in %d seconds\n", bootdelay
  99 #define CONFIG_AUTOBOOT_DELAY_STR       "d"
 100 #define CONFIG_AUTOBOOT_STOP_STR        " "
 101
 102 /*
 103  * After booting the board for the first time, new ethernet addresses
 104  * should be generated and assigned to the environment variables
 105  * "ethaddr" and "eth1addr". This is normally done during production.
 106  */
 107 #define CONFIG_OVERWRITE_ETHADDR_ONCE
 108
 109 /*
 110  * BOOTP options
 111  */
 112 #define CONFIG_BOOTP_SUBNETMASK
 113 #define CONFIG_BOOTP_GATEWAY
 114
 115
 116 /*
 117  * Command line configuration.
 118  */
 119 #include <config_cmd_default.h>
 120
 121 #define CONFIG_CMD_ASKENV
 122 #define CONFIG_CMD_DHCP
 123 #define CONFIG_CMD_EXT2
 124 #define CONFIG_CMD_FAT
 125 #define CONFIG_CMD_JFFS2
 126 #define CONFIG_CMD_MMC
 127
 128 #undef CONFIG_CMD_FPGA
 129 #undef CONFIG_CMD_SETGETDCR
 130 #undef CONFIG_CMD_SOURCE
 131 #undef CONFIG_CMD_XIMG
 132
 133 #define CONFIG_ATMEL_USART
 134 #define CONFIG_MACB
 135 #define CONFIG_PORTMUX_PIO
 136 #define CONFIG_SYS_NR_PIOS                      5
 137 #define CONFIG_SYS_HSDRAMC
 138 #define CONFIG_MMC
 139 #define CONFIG_GENERIC_ATMEL_MCI
 140 #define CONFIG_GENERIC_MMC
 141
 142 #define CONFIG_SYS_DCACHE_LINESZ                32
 143 #define CONFIG_SYS_ICACHE_LINESZ                32
 144
 145 #define CONFIG_NR_DRAM_BANKS            1
 146
 147 /* External flash on Favr-32 */
 148 #if 0
 149 #define CONFIG_SYS_FLASH_CFI                    1
 150 #define CONFIG_FLASH_CFI_DRIVER         1
 151 #endif
 152
 153 #define CONFIG_SYS_FLASH_BASE                   0x00000000
 154 #define CONFIG_SYS_FLASH_SIZE                   0x800000
 155 #define CONFIG_SYS_MAX_FLASH_BANKS              1
 156 #define CONFIG_SYS_MAX_FLASH_SECT               135
 157
 158 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 159 #define CONFIG_SYS_TEXT_BASE            0x00000000
 160
 161 #define CONFIG_SYS_INTRAM_BASE                  INTERNAL_SRAM_BASE
 162 #define CONFIG_SYS_INTRAM_SIZE                  INTERNAL_SRAM_SIZE
 163 #define CONFIG_SYS_SDRAM_BASE                   EBI_SDRAM_BASE
 164
 165 #define CONFIG_ENV_IS_IN_FLASH
 166 #define CONFIG_ENV_SIZE                 65536
 167 #define CONFIG_ENV_ADDR                 (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
 168
 169 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
 170
 171 #define CONFIG_SYS_MALLOC_LEN                   (256*1024)
 172 #define CONFIG_SYS_DMA_ALLOC_LEN                (16384)
 173
 174 /* Allow 4MB for the kernel run-time image */
 175 #define CONFIG_SYS_LOAD_ADDR                    (EBI_SDRAM_BASE + 0x00400000)
 176 #define CONFIG_SYS_BOOTPARAMS_LEN               (16 * 1024)
 177
 178 /* Other configuration settings that shouldn't have to change all that often */
 179 #define CONFIG_SYS_PROMPT                       "U-Boot> "
 180 #define CONFIG_SYS_CBSIZE                       256
 181 #define CONFIG_SYS_MAXARGS                      16
 182 #define CONFIG_SYS_PBSIZE                       (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 183 #define CONFIG_SYS_LONGHELP
 184
 185 #define CONFIG_SYS_MEMTEST_START                EBI_SDRAM_BASE
 186 #define CONFIG_SYS_MEMTEST_END                  (CONFIG_SYS_MEMTEST_START + 0x700000)
 187 #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
 188
 189 #endif /* __CONFIG_H */