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1 /*
2 * Copyright (C) 2015 Timesys Corporation
3 * Copyright (C) 2015 General Electric Company
4 * Copyright (C) 2014 Advantech
5 * Copyright (C) 2012 Freescale Semiconductor, Inc.
6 *
7 * Configuration settings for the GE MX6Q Bx50v3 boards.
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 */
11
12 #ifndef __GE_BX50V3_CONFIG_H
13 #define __GE_BX50V3_CONFIG_H
14
15 #include <asm/arch/imx-regs.h>
16 #include <asm/mach-imx/gpio.h>
17
18 #define BX50V3_BOOTARGS_EXTRA
19 #if defined(CONFIG_TARGET_GE_B450V3)
20 #define CONFIG_BOARD_NAME "General Electric B450v3"
21 #elif defined(CONFIG_TARGET_GE_B650V3)
22 #define CONFIG_BOARD_NAME "General Electric B650v3"
23 #elif defined(CONFIG_TARGET_GE_B850V3)
24 #define CONFIG_BOARD_NAME "General Electric B850v3"
25 #undef BX50V3_BOOTARGS_EXTRA
26 #define BX50V3_BOOTARGS_EXTRA "video=DP-1:1024x768@60 " \
27 "video=HDMI-A-1:1024x768@60 "
28 #else
29 #define CONFIG_BOARD_NAME "General Electric BA16 Generic"
30 #endif
31
32 #define CONFIG_MXC_UART_BASE UART3_BASE
33 #define CONSOLE_DEV "ttymxc2"
34
35 #define CONFIG_SUPPORT_EMMC_BOOT
36
37
38 #include "mx6_common.h"
39 #include <linux/sizes.h>
40
41 #define CONFIG_CMDLINE_TAG
42 #define CONFIG_SETUP_MEMORY_TAGS
43 #define CONFIG_INITRD_TAG
44 #define CONFIG_REVISION_TAG
45 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
46
47 #define CONFIG_HW_WATCHDOG
48 #define CONFIG_IMX_WATCHDOG
49 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 6000
50
51 #define CONFIG_LAST_STAGE_INIT
52
53 #define CONFIG_MXC_GPIO
54 #define CONFIG_MXC_UART
55
56 #define CONFIG_MXC_OCOTP
57
58 /* SATA Configs */
59 #ifdef CONFIG_CMD_SATA
60 #define CONFIG_SYS_SATA_MAX_DEVICE 1
61 #define CONFIG_DWC_AHSATA_PORT_ID 0
62 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
63 #define CONFIG_LBA48
64 #endif
65
66 /* MMC Configs */
67 #define CONFIG_FSL_ESDHC
68 #define CONFIG_FSL_USDHC
69 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
70 #define CONFIG_BOUNCE_BUFFER
71
72 /* USB Configs */
73 #ifdef CONFIG_USB
74 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
75 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
76 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
77 #define CONFIG_MXC_USB_FLAGS 0
78
79 #define CONFIG_USBD_HS
80 #define CONFIG_USB_GADGET_MASS_STORAGE
81 #endif
82
83 /* Networking Configs */
84 #ifdef CONFIG_NET
85 #define CONFIG_FEC_MXC
86 #define CONFIG_MII
87 #define IMX_FEC_BASE ENET_BASE_ADDR
88 #define CONFIG_FEC_XCV_TYPE RGMII
89 #define CONFIG_ETHPRIME "FEC"
90 #define CONFIG_FEC_MXC_PHYADDR 4
91 #define CONFIG_PHY_ATHEROS
92 #endif
93
94 /* Serial Flash */
95 #ifdef CONFIG_CMD_SF
96 #define CONFIG_MXC_SPI
97 #define CONFIG_SF_DEFAULT_BUS 0
98 #define CONFIG_SF_DEFAULT_CS 0
99 #define CONFIG_SF_DEFAULT_SPEED 20000000
100 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
101 #endif
102
103 /* allow to overwrite serial and ethaddr */
104 #define CONFIG_ENV_OVERWRITE
105 #define CONFIG_CONS_INDEX 1
106
107 #define CONFIG_LOADADDR 0x12000000
108 #define CONFIG_SYS_TEXT_BASE 0x17800000
109
110 #define CONFIG_EXTRA_ENV_SETTINGS \
111 "bootcause=POR\0" \
112 "bootlimit=10\0" \
113 "image=/boot/fitImage\0" \
114 "fdt_high=0xffffffff\0" \
115 "dev=mmc\0" \
116 "devnum=1\0" \
117 "rootdev=mmcblk0p\0" \
118 "quiet=quiet loglevel=0\0" \
119 "console=" CONSOLE_DEV "\0" \
120 "setargs=setenv bootargs root=/dev/${rootdev}${partnum} " \
121 "ro rootwait cma=128M " \
122 "bootcause=${bootcause} " \
123 "${quiet} console=${console} ${rtc_status} " \
124 BX50V3_BOOTARGS_EXTRA "\0" \
125 "doquiet=" \
126 "if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \
127 "then setenv quiet; fi\0" \
128 "hasfirstboot=" \
129 "ext2load ${dev} ${devnum}:${partnum} 0x7000A000 " \
130 "/boot/bootcause/firstboot\0" \
131 "swappartitions=" \
132 "setexpr partnum 3 - ${partnum}\0" \
133 "failbootcmd=" \
134 "msg=\"Monitor failed to start. Try again, or contact GE Service for support.\"; " \
135 "echo $msg; " \
136 "setenv stdout vga; " \
137 "echo \"\n\n\n\n \" $msg; " \
138 "setenv stdout serial; " \
139 "mw.b 0x7000A000 0xbc; " \
140 "mw.b 0x7000A001 0x00; " \
141 "ext4write ${dev} ${devnum}:5 0x7000A000 /boot/failures 2\0" \
142 "altbootcmd=" \
143 "run doquiet; " \
144 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
145 "run hasfirstboot || setenv partnum 0; " \
146 "if test ${partnum} != 0; then " \
147 "setenv bootcause REVERT; " \
148 "run swappartitions loadimage doboot; " \
149 "fi; " \
150 "run failbootcmd\0" \
151 "loadimage=" \
152 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
153 "doboot=" \
154 "echo Booting from ${dev}:${devnum}:${partnum} ...; " \
155 "run setargs; " \
156 "bootm ${loadaddr}#conf@${confidx}\0" \
157 "tryboot=" \
158 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
159 "run loadimage || run swappartitions && run loadimage || " \
160 "setenv partnum 0 && echo MISSING IMAGE;" \
161 "run doboot; " \
162 "run failbootcmd\0" \
163
164 #define CONFIG_MMCBOOTCOMMAND \
165 "if mmc dev ${devnum}; then " \
166 "run doquiet; " \
167 "run tryboot; " \
168 "fi; " \
169
170 #define CONFIG_USBBOOTCOMMAND \
171 "echo Unsupported; " \
172
173 #ifdef CONFIG_CMD_USB
174 #define CONFIG_BOOTCOMMAND CONFIG_USBBOOTCOMMAND
175 #else
176 #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
177 #endif
178
179 #define CONFIG_ARP_TIMEOUT 200UL
180
181 /* Miscellaneous configurable options */
182 #define CONFIG_SYS_LONGHELP
183 #define CONFIG_AUTO_COMPLETE
184
185 #define CONFIG_SYS_MEMTEST_START 0x10000000
186 #define CONFIG_SYS_MEMTEST_END 0x10010000
187 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
188
189 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
190
191 #define CONFIG_CMDLINE_EDITING
192
193 /* Physical Memory Map */
194 #define CONFIG_NR_DRAM_BANKS 1
195 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
196
197 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
198 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
199 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
200
201 #define CONFIG_SYS_INIT_SP_OFFSET \
202 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
203 #define CONFIG_SYS_INIT_SP_ADDR \
204 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
205
206 /* environment organization */
207 #define CONFIG_ENV_SIZE (8 * 1024)
208 #define CONFIG_ENV_OFFSET (768 * 1024)
209 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
210 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
211 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
212 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
213 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
214
215 #ifndef CONFIG_SYS_DCACHE_OFF
216 #endif
217
218 #define CONFIG_SYS_FSL_USDHC_NUM 3
219
220 /* Framebuffer */
221 #define CONFIG_VIDEO
222 #ifdef CONFIG_VIDEO
223 #define CONFIG_VIDEO_IPUV3
224 #define CONFIG_CFB_CONSOLE
225 #define CONFIG_VGA_AS_SINGLE_DEVICE
226 #define CONFIG_SYS_CONSOLE_FG_COL 0xFF
227 #define CONFIG_SYS_CONSOLE_BG_COL 0x00
228 #define CONFIG_HIDE_LOGO_VERSION
229 #define CONFIG_IMX_HDMI
230 #define CONFIG_IMX_VIDEO_SKIP
231 #define CONFIG_CMD_BMP
232 #endif
233
234 #define CONFIG_PWM_IMX
235 #define CONFIG_IMX6_PWM_PER_CLK 66000000
236
237 #define CONFIG_PCI
238 #define CONFIG_PCI_PNP
239 #define CONFIG_PCI_SCAN_SHOW
240 #define CONFIG_PCIE_IMX
241 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
242 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5)
243
244 #define CONFIG_RTC_RX8010SJ
245 #define CONFIG_SYS_RTC_BUS_NUM 2
246 #define CONFIG_SYS_I2C_RTC_ADDR 0x32
247
248 /* I2C Configs */
249 #define CONFIG_SYS_I2C
250 #define CONFIG_SYS_I2C_MXC
251 #define CONFIG_SYS_I2C_SPEED 100000
252 #define CONFIG_SYS_I2C_MXC_I2C1
253 #define CONFIG_SYS_I2C_MXC_I2C2
254 #define CONFIG_SYS_I2C_MXC_I2C3
255
256 #define CONFIG_SYS_NUM_I2C_BUSES 11
257 #define CONFIG_SYS_I2C_MAX_HOPS 1
258 #define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \
259 {1, {I2C_NULL_HOP} }, \
260 {2, {I2C_NULL_HOP} }, \
261 {0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \
262 {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
263 {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
264 {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
265 {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
266 {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
267 {0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \
268 {0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \
269 }
270
271 #define CONFIG_BCH
272
273 #define CONFIG_BOOTCOUNT_LIMIT
274 #define CONFIG_BOOTCOUNT_EXT
275 #define CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE "mmc"
276 #define CONFIG_SYS_BOOTCOUNT_EXT_DEVPART "1:5"
277 #define CONFIG_SYS_BOOTCOUNT_EXT_NAME "/boot/failures"
278 #define CONFIG_SYS_BOOTCOUNT_ADDR 0x7000A000
279
280 #endif /* __GE_BX50V3_CONFIG_H */