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1 /* Configuration header file for Gaisler Research AB's Template
2 * design (GPL Open Source SPARC/LEON3 96MHz) for Altera NIOS
3 * Development board Stratix II edition, with the FPGA device
4 * EP2S60.
5 *
6 * (C) Copyright 2003-2005
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 *
9 * (C) Copyright 2008
10 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
11 *
12 * SPDX-License-Identifier: GPL-2.0+
13 */
14
15 #ifndef __CONFIG_H__
16 #define __CONFIG_H__
17
18 /*
19 * High Level Configuration Options
20 * (easy to change)
21 */
22
23 /* Altera NIOS Development board, Stratix II board */
24 #define CONFIG_GR_EP2S60 1
25
26 /* CPU / AMBA BUS configuration */
27 #define CONFIG_SYS_CLK_FREQ 96000000 /* 96MHz */
28
29 /* Number of SPARC register windows */
30 #define CONFIG_SYS_SPARC_NWINDOWS 8
31
32 /* Define this is the GR-2S60-MEZZ mezzanine is available and you
33 * want to use the USB and GRETH functionality of the board
34 */
35 #undef GR_2S60_MEZZ
36
37 #ifdef GR_2S60_MEZZ
38 #define USE_GRETH 1
39 #define USE_GRUSB 1
40 #endif
41
42 /*
43 * Serial console configuration
44 */
45 #define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
46 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
47
48 /* Partitions */
49 #define CONFIG_DOS_PARTITION
50 #define CONFIG_MAC_PARTITION
51 #define CONFIG_ISO_PARTITION
52
53 /*
54 * Supported commands
55 */
56 #define CONFIG_CMD_REGINFO
57 #define CONFIG_CMD_AMBAPP
58 #define CONFIG_CMD_PING
59 #define CONFIG_CMD_DIAG
60 #define CONFIG_CMD_IRQ
61
62 /* USB support */
63 #if USE_GRUSB
64 #define CONFIG_USB_UHCI
65 #define CONFIG_CMD_FAT
66 #define CONFIG_CMD_EXT2
67 #define CONFIG_CMD_USB
68 #define CONFIG_USB_STORAGE
69 /* Enable needed helper functions */
70 #define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */
71 #endif
72
73 /*
74 * Autobooting
75 */
76 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
77
78 #define CONFIG_PREBOOT "echo;" \
79 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
80 "echo"
81
82 #undef CONFIG_BOOTARGS
83
84 #define CONFIG_EXTRA_ENV_SETTINGS \
85 "netdev=eth0\0" \
86 "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
87 "nfsroot=${serverip}:${rootpath}\0" \
88 "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
89 "addip=setenv bootargs ${bootargs} " \
90 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
91 ":${hostname}:${netdev}:off panic=1\0" \
92 "flash_nfs=run nfsargs addip;" \
93 "bootm ${kernel_addr}\0" \
94 "flash_self=run ramargs addip;" \
95 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
96 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
97 "scratch=40800000\0" \
98 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
99 "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.207:192.168.0.20:192.168.0.1:255.255.255.0:ml401:eth0\0" \
100 ""
101
102 #define CONFIG_NETMASK 255.255.255.0
103 #define CONFIG_GATEWAYIP 192.168.0.1
104 #define CONFIG_SERVERIP 192.168.0.20
105 #define CONFIG_IPADDR 192.168.0.207
106 #define CONFIG_ROOTPATH "/export/rootfs"
107 #define CONFIG_HOSTNAME ml401
108 #define CONFIG_BOOTFILE "/uImage"
109
110 #define CONFIG_BOOTCOMMAND "run flash_self"
111
112 /* Memory MAP
113 *
114 * Flash:
115 * |--------------------------------|
116 * | 0x00000000 Text & Data & BSS | *
117 * | for Monitor | *
118 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
119 * | UNUSED / Growth | * 256kb
120 * |--------------------------------|
121 * | 0x00050000 Base custom area | *
122 * | kernel / FS | *
123 * | | * Rest of Flash
124 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
125 * | END-0x00008000 Environment | * 32kb
126 * |--------------------------------|
127 *
128 *
129 *
130 * Main Memory:
131 * |--------------------------------|
132 * | UNUSED / scratch area |
133 * | |
134 * | |
135 * | |
136 * | |
137 * |--------------------------------|
138 * | Monitor .Text / .DATA / .BSS | * 512kb
139 * | Relocated! | *
140 * |--------------------------------|
141 * | Monitor Malloc | * 128kb (contains relocated environment)
142 * |--------------------------------|
143 * | Monitor/kernel STACK | * 64kb
144 * |--------------------------------|
145 * | Page Table for MMU systems | * 2k
146 * |--------------------------------|
147 * | PROM Code accessed from Linux | * 6kb-128b
148 * |--------------------------------|
149 * | Global data (avail from kernel)| * 128b
150 * |--------------------------------|
151 *
152 */
153
154 /*
155 * Flash configuration (8,16 or 32 MB)
156 * TEXT base always at 0xFFF00000
157 * ENV_ADDR always at 0xFFF40000
158 * FLASH_BASE at 0xFC000000 for 64 MB
159 * 0xFE000000 for 32 MB
160 * 0xFF000000 for 16 MB
161 * 0xFF800000 for 8 MB
162 */
163 /*#define CONFIG_SYS_NO_FLASH 1*/
164 #define CONFIG_SYS_FLASH_BASE 0x00000000
165 #define CONFIG_SYS_FLASH_SIZE 0x00400000 /* FPGA Bit file is in top of FLASH, we only ues the bottom 4Mb */
166
167 #define PHYS_FLASH_SECT_SIZE 0x00010000 /* 64 KB sectors */
168 #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */
169 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
170
171 #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
172 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
173 #define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
174 #define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
175 #define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
176
177 /*** CFI CONFIG ***/
178 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
179 #define CONFIG_FLASH_CFI_DRIVER
180 #define CONFIG_SYS_FLASH_CFI
181 /* Bypass cache when reading regs from flash memory */
182 #define CONFIG_SYS_FLASH_CFI_BYPASS_READ
183 /* Buffered writes (32byte/go) instead of single accesses */
184 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
185
186 /*
187 * Environment settings
188 */
189 /*#define CONFIG_ENV_IS_NOWHERE 1*/
190 #define CONFIG_ENV_IS_IN_FLASH 1
191 /* CONFIG_ENV_ADDR need to be at sector boundary */
192 #define CONFIG_ENV_SIZE 0x8000
193 #define CONFIG_ENV_SECT_SIZE 0x20000
194 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
195 #define CONFIG_ENV_OVERWRITE 1
196
197 /*
198 * Memory map
199 */
200 #define CONFIG_SYS_SDRAM_BASE 0x40000000
201 #define CONFIG_SYS_SDRAM_SIZE 0x02000000
202 #define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
203
204 /* no SRAM available */
205 #undef CONFIG_SYS_SRAM_BASE
206 #undef CONFIG_SYS_SRAM_SIZE
207
208 #define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
209 #define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
210 #define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
211
212 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_END - GENERATED_GBL_DATA_SIZE)
213
214 #define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
215 #define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
216
217 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
218 #define CONFIG_SYS_STACK_SIZE (0x10000-32)
219
220 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
221 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
222 # define CONFIG_SYS_RAMBOOT 1
223 #endif
224
225 #define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
226 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
227 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
228
229 #define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
230 #define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
231
232 /* relocated monitor area */
233 #define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
234 #define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
235
236 /* make un relocated address from relocated address */
237 #define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
238
239 /*
240 * Ethernet configuration uses on board SMC91C111, however if a mezzanine
241 * with a PHY is attached the GRETH can be used on this board.
242 * Define USE_GRETH in order to use the mezzanine provided PHY with the
243 * onchip GRETH network MAC, note that this is not supported by the
244 * template design.
245 */
246 #ifndef USE_GRETH
247
248 /* USE SMC91C111 MAC */
249 #define CONFIG_SMC91111 1
250 #define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */
251 #define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */
252 #undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
253 /*#define CONFIG_SHOW_ACTIVITY*/
254 #define CONFIG_NET_RETRY_COUNT 10 /* # of retries */
255
256 #else
257
258 /* USE GRETH Ethernet Driver */
259 #define CONFIG_GRETH 1
260 #endif
261
262 #define CONFIG_PHY_ADDR 0x00
263
264 /*
265 * Miscellaneous configurable options
266 */
267 #define CONFIG_SYS_LONGHELP /* undef to save memory */
268 #if defined(CONFIG_CMD_KGDB)
269 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
270 #else
271 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
272 #endif
273 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
274 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
275 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
276
277 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
278 #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
279
280 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
281
282 /*-----------------------------------------------------------------------
283 * USB stuff
284 *-----------------------------------------------------------------------
285 */
286 #define CONFIG_USB_CLOCK 0x0001BBBB
287 #define CONFIG_USB_CONFIG 0x00005000
288
289 /***** Gaisler GRLIB IP-Cores Config ********/
290
291 /* AMBA Plug & Play info display on startup */
292 /*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/
293
294 #define CONFIG_SYS_GRLIB_SDRAM 0
295
296 /* See, GRLIB Docs (grip.pdf) on how to set up
297 * These the memory controller registers.
298 */
299 #define CONFIG_SYS_GRLIB_MEMCFG1 (0x10f800ff | (1<<11))
300 #define CONFIG_SYS_GRLIB_MEMCFG2 0x00000000
301 #define CONFIG_SYS_GRLIB_MEMCFG3 0x00000000
302
303 #define CONFIG_SYS_GRLIB_FT_MEMCFG1 (0x10f800ff | (1<<11))
304 #define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x00000000
305 #define CONFIG_SYS_GRLIB_FT_MEMCFG3 0x00000000
306
307 #define CONFIG_SYS_GRLIB_DDR_CFG 0xa900830a
308
309 #define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
310 #define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
311
312 /* Identification string */
313 #define CONFIG_IDENT_STRING "GAISLER LEON3 EP2S60"
314
315 /* default kernel command line */
316 #define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
317
318 #endif /* __CONFIG_H */