include/configs/grasshopper.h

   1 /*
   2  * Copyright (C) 2011
   3  * Corscience GmbH & Co.KG, Andreas Bießmann <biessmann@corscience.de>
   4  *
   5  * Configuration settings for the grasshopper (ICnova AP7000) board
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9 #ifndef __GRASSHOPPER_CONFIG_H
  10 #define __GRASSHOPPER_CONFIG_H
  11
  12 #include <asm/arch/hardware.h>
  13
  14 #define CONFIG_AT32AP
  15 #define CONFIG_AT32AP7000
  16
  17 /*
  18  * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
  19  * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
  20  * PLL frequency.
  21  * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
  22  */
  23 #define CONFIG_PLL
  24 #define CONFIG_SYS_POWER_MANAGER
  25 #define CONFIG_SYS_OSC0_HZ              20000000
  26 #define CONFIG_SYS_PLL0_DIV             1
  27 #define CONFIG_SYS_PLL0_MUL             7
  28 #define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16
  29 /*
  30  * Set the CPU running at:
  31  * PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz
  32  */
  33 #define CONFIG_SYS_CLKDIV_CPU           0
  34 /*
  35  * Set the HSB running at:
  36  * PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz
  37  */
  38 #define CONFIG_SYS_CLKDIV_HSB           1
  39 /*
  40  * Set the PBA running at:
  41  * PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz
  42  */
  43 #define CONFIG_SYS_CLKDIV_PBA           2
  44 /*
  45  * Set the PBB running at:
  46  * PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz
  47  */
  48 #define CONFIG_SYS_CLKDIV_PBB           1
  49
  50 /* Reserve VM regions for SDRAM and NOR flash */
  51 #define CONFIG_SYS_NR_VM_REGIONS        2
  52
  53 /*
  54  * The PLLOPT register controls the PLL like this:
  55  *   icp = PLLOPT<2>
  56  *   ivco = PLLOPT<1:0>
  57  *
  58  * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
  59  */
  60 #define CONFIG_SYS_PLL0_OPT             0x04
  61
  62 #define CONFIG_USART_BASE               ATMEL_BASE_USART1
  63 #define CONFIG_USART_ID                 1
  64
  65 #define CONFIG_BOARD_EARLY_INIT_F
  66 #define CONFIG_BOARD_EARLY_INIT_R
  67
  68 /* User serviceable stuff */
  69 #define CONFIG_CMDLINE_TAG
  70 #define CONFIG_SETUP_MEMORY_TAGS
  71 #define CONFIG_INITRD_TAG
  72
  73 #define CONFIG_STACKSIZE                (2048)
  74
  75 #define CONFIG_BAUDRATE                 115200
  76
  77 #define CONFIG_BOOTDELAY                1
  78
  79 /*
  80  * After booting the board for the first time, new ethernet addresses
  81  * should be generated and assigned to the environment variables
  82  * "ethaddr". This is normally done during production.
  83  */
  84 #define CONFIG_OVERWRITE_ETHADDR_ONCE
  85
  86 /*
  87  * BOOTP options
  88  */
  89 #define CONFIG_BOOTP_SUBNETMASK
  90 #define CONFIG_BOOTP_GATEWAY
  91
  92 /*
  93  * Command line configuration.
  94  */
  95 /* add useful commands */
  96 #define CONFIG_CMD_ASKENV
  97 #define CONFIG_CMD_DHCP
  98 #define CONFIG_CMD_JFFS2
  99 #define CONFIG_CMD_PING
 100 #define CONFIG_CMD_REGINFO
 101
 102 #define CONFIG_SYS_HUSH_PARSER
 103 #define CONFIG_AUTO_COMPLETE
 104 #define CONFIG_CMDLINE_EDITING
 105
 106 #define CONFIG_ATMEL_USART
 107 #define CONFIG_MACB
 108 #define CONFIG_PORTMUX_PIO
 109 #define CONFIG_SYS_NR_PIOS              5
 110 #define CONFIG_SYS_HSDRAMC
 111
 112 #define CONFIG_SYS_DCACHE_LINESZ        32
 113 #define CONFIG_SYS_ICACHE_LINESZ        32
 114
 115 #define CONFIG_NR_DRAM_BANKS            1
 116
 117 #define CONFIG_SYS_FLASH_CFI
 118 #define CONFIG_FLASH_CFI_DRIVER
 119
 120 #define CONFIG_SYS_FLASH_BASE           0x00000000
 121 #define CONFIG_SYS_FLASH_SIZE           0x800000
 122 #define CONFIG_SYS_MAX_FLASH_BANKS      1
 123 #define CONFIG_SYS_MAX_FLASH_SECT       135
 124
 125 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 126 #define CONFIG_SYS_TEXT_BASE            0x00000000
 127
 128 #define CONFIG_SYS_INTRAM_BASE          INTERNAL_SRAM_BASE
 129 #define CONFIG_SYS_INTRAM_SIZE          INTERNAL_SRAM_SIZE
 130 #define CONFIG_SYS_SDRAM_BASE           EBI_SDRAM_BASE
 131
 132 #define CONFIG_ENV_IS_IN_FLASH
 133 /* place u-boot env in flash sector after u-boot */
 134 #define CONFIG_ENV_SIZE                 0x10000
 135 #define CONFIG_ENV_ADDR                 0x20000
 136
 137 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INTRAM_BASE + \
 138                                          CONFIG_SYS_INTRAM_SIZE)
 139
 140 #define CONFIG_SYS_MALLOC_LEN           (256*1024)
 141
 142 /* Allow 4MB for the kernel run-time image */
 143 #define CONFIG_SYS_LOAD_ADDR            (EBI_SDRAM_BASE + 0x00400000)
 144 #define CONFIG_SYS_BOOTPARAMS_LEN       (16 * 1024)
 145
 146 /* Other configuration settings that shouldn't have to change all that often */
 147 #define CONFIG_SYS_CBSIZE               256
 148 #define CONFIG_SYS_MAXARGS              16
 149 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 150                                          sizeof(CONFIG_SYS_PROMPT) + 16)
 151 #define CONFIG_SYS_LONGHELP
 152
 153 #define CONFIG_SYS_MEMTEST_START        EBI_SDRAM_BASE
 154 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + 0x700000)
 155
 156 #endif /* __GRASSHOPPER_CONFIG_H */
 157 /* vim: set ts=8 noet: */