include/configs/h2200.h

   1 /*
   2  * iPAQ h2200 board configuration
   3  *
   4  * Copyright (C) 2012 Lukasz Dalek <luk0104@gmail.com>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __CONFIG_H
  10 #define __CONFIG_H
  11
  12 #define CONFIG_MACH_TYPE                MACH_TYPE_H2200
  13
  14 #define CONFIG_CPU_PXA25X               1
  15 #define CONFIG_BOARD_H2200
  16
  17 #define CONFIG_NR_DRAM_BANKS            1
  18 #define PHYS_SDRAM_1                    0xa0000000 /* SDRAM Bank #1 */
  19 #define PHYS_SDRAM_1_SIZE               0x04000000 /* 64 MB */
  20
  21 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
  22 #define CONFIG_SYS_SDRAM_SIZE           PHYS_SDRAM_1_SIZE
  23
  24 #define CONFIG_SYS_INIT_SP_ADDR         0xfffff800
  25
  26 #define CONFIG_ENV_SIZE                 0x00040000
  27 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 128*1024)
  28
  29 #define CONFIG_SYS_LOAD_ADDR            0xa3000000 /* default load address */
  30
  31 /*
  32  * iPAQ 1st stage bootloader loads 2nd stage bootloader
  33  * at address 0xa0040000 but bootloader requires header
  34  * which is 0x1000 long.
  35  *
  36  * --- Header begin ---
  37  *      .word 0xea0003fe ; b 0x1000
  38  *
  39  *      .org 0x40
  40  *      .ascii "ECEC"
  41  *
  42  *      .org 0x1000
  43  * --- Header end ---
  44  */
  45
  46 #define CONFIG_SYS_TEXT_BASE            0xa0041000
  47
  48 /*
  49  * Static chips
  50  */
  51
  52 #define CONFIG_SYS_MSC0_VAL             0x246c7ffc
  53 #define CONFIG_SYS_MSC1_VAL             0x7ff07ff0
  54 #define CONFIG_SYS_MSC2_VAL             0x7ff07ff0
  55
  56 /*
  57  * PCMCIA and CF Interfaces
  58  */
  59
  60 #define CONFIG_SYS_MECR_VAL             0x00000000
  61 #define CONFIG_SYS_MCMEM0_VAL           0x00000000
  62 #define CONFIG_SYS_MCMEM1_VAL           0x00000000
  63 #define CONFIG_SYS_MCATT0_VAL           0x00000000
  64 #define CONFIG_SYS_MCATT1_VAL           0x00000000
  65 #define CONFIG_SYS_MCIO0_VAL            0x00000000
  66 #define CONFIG_SYS_MCIO1_VAL            0x00000000
  67
  68 #define CONFIG_SYS_FLYCNFG_VAL          0x00000000
  69 #define CONFIG_SYS_SXCNFG_VAL           0x00040004
  70
  71 #define CONFIG_SYS_MDREFR_VAL           0x0099E018
  72 #define CONFIG_SYS_MDCNFG_VAL           0x01C801CB
  73 #define CONFIG_SYS_MDMRS_VAL            0x00220022
  74
  75 #define CONFIG_SYS_PSSR_VAL             0x00000000
  76 #define CONFIG_SYS_CKEN                 0x00004840
  77 #define CONFIG_SYS_CCCR                 0x00000161
  78
  79 /*
  80  * GPIOs
  81  */
  82
  83 #define CONFIG_SYS_GPSR0_VAL            0x01000000
  84 #define CONFIG_SYS_GPSR1_VAL            0x00000000
  85 #define CONFIG_SYS_GPSR2_VAL            0x00010000
  86
  87 #define CONFIG_SYS_GPCR0_VAL            0x00000000
  88 #define CONFIG_SYS_GPCR1_VAL            0x00000000
  89 #define CONFIG_SYS_GPCR2_VAL            0x00000000
  90
  91 #define CONFIG_SYS_GPDR0_VAL            0xF7E38C00
  92 #define CONFIG_SYS_GPDR1_VAL            0xBCFFBF83
  93 #define CONFIG_SYS_GPDR2_VAL            0x000157FF
  94
  95 #define CONFIG_SYS_GAFR0_L_VAL          0x80401000
  96 #define CONFIG_SYS_GAFR0_U_VAL          0x00000112
  97 #define CONFIG_SYS_GAFR1_L_VAL          0x600A9550
  98 #define CONFIG_SYS_GAFR1_U_VAL          0x0005AAAA
  99 #define CONFIG_SYS_GAFR2_L_VAL          0x20000000
 100 #define CONFIG_SYS_GAFR2_U_VAL          0x00000000
 101
 102 /*
 103  * Serial port
 104  */
 105 #define CONFIG_FFUART
 106 #define CONFIG_CONS_INDEX               3
 107
 108 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 38400, 115200 }
 109
 110 #define CONFIG_SETUP_MEMORY_TAGS
 111 #define CONFIG_CMDLINE_TAG
 112 #define CONFIG_INITRD_TAG
 113
 114 /* Monitor Command Prompt */
 115
 116 #define CONFIG_USB_DEV_PULLUP_GPIO      33
 117 /* USB VBUS GPIO 3 */
 118
 119 #define CONFIG_BOOTCOMMAND              \
 120         "setenv downloaded 0 ; while test $downloaded -eq 0 ; do " \
 121         "if bootp ; then setenv downloaded 1 ; fi ; done ; " \
 122         "source :script ; " \
 123         "bootm ; "
 124
 125 #define CONFIG_USB_GADGET_PXA2XX
 126 #define CONFIG_USB_ETH_SUBSET
 127
 128 #define CONFIG_USBNET_DEV_ADDR          "de:ad:be:ef:00:01"
 129 #define CONFIG_EXTRA_ENV_SETTINGS \
 130         "stdin=serial\0" \
 131         "stdout=serial\0" \
 132         "stderr=serial\0"
 133
 134 #endif /* __CONFIG_H */