include/configs/ibf-dsp561.h

   1 /*
   2  * U-Boot - Configuration file for IBF-DSP561 board
   3  */
   4
   5 #ifndef __CONFIG_IBF_DSP561__H__
   6 #define __CONFIG_IBF_DSP561__H__
   7
   8 #include <asm/config-pre.h>
   9
  10 /*
  11  * Processor Settings
  12  */
  13 #define CONFIG_BFIN_CPU             bf561-0.5
  14 #define CONFIG_BFIN_BOOT_MODE       BFIN_BOOT_BYPASS
  15
  16 /*
  17  * Clock Settings
  18  *      CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
  19  *      SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
  20  */
  21 /* CONFIG_CLKIN_HZ is any value in Hz                                   */
  22 #define CONFIG_CLKIN_HZ                 25000000
  23 /* CLKIN_HALF controls the DF bit in PLL_CTL      0 = CLKIN             */
  24 /*                                                1 = CLKIN / 2         */
  25 #define CONFIG_CLKIN_HALF               0
  26 /* PLL_BYPASS controls the BYPASS bit in PLL_CTL  0 = do not bypass     */
  27 /*                                                1 = bypass PLL        */
  28 #define CONFIG_PLL_BYPASS               0
  29 /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL              */
  30 /* Values can range from 0-63 (where 0 means 64)                        */
  31 #define CONFIG_VCO_MULT                 24
  32 /* CCLK_DIV controls the core clock divider                             */
  33 /* Values can be 1, 2, 4, or 8 ONLY                                     */
  34 #define CONFIG_CCLK_DIV                 1
  35 /* SCLK_DIV controls the system clock divider                           */
  36 /* Values can range from 1-15                                           */
  37 #define CONFIG_SCLK_DIV                 5
  38
  39 /*
  40  * Memory Settings
  41  */
  42 #define CONFIG_MEM_ADD_WDTH     9
  43 #define CONFIG_MEM_SIZE         64
  44
  45 #define CONFIG_EBIU_SDRRC_VAL   0x377
  46 #define CONFIG_EBIU_SDGCTL_VAL  0x91998d
  47 #define CONFIG_EBIU_SDBCTL_VAL  0x15
  48
  49 #define CONFIG_EBIU_AMGCTL_VAL  0x3F
  50 #define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0
  51 #define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0
  52
  53 #define CONFIG_SYS_MONITOR_LEN  (256 * 1024)
  54 #define CONFIG_SYS_MALLOC_LEN   (128 * 1024)
  55
  56 /*
  57  * Network Settings
  58  */
  59 #define ADI_CMDS_NETWORK        1
  60 #define CONFIG_DRIVER_AX88180   1
  61 #define AX88180_BASE            0x2c000000
  62 #define CONFIG_HOSTNAME         ibf-dsp561
  63
  64 /*
  65  * Flash Settings
  66  */
  67 #define CONFIG_SYS_FLASH_CFI            /* The flash is CFI compatible */
  68 #define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
  69 #define CONFIG_SYS_FLASH_CFI_AMD_RESET
  70 #define CONFIG_SYS_FLASH_BASE           0x20000000
  71 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks */
  72 #define CONFIG_SYS_MAX_FLASH_SECT       135     /* max number of sectors on one chip */
  73 /* The BF561-EZKIT uses a top boot flash */
  74 #define CONFIG_ENV_IS_IN_FLASH  1
  75 #define CONFIG_ENV_OFFSET               0x4000
  76 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
  77 #define CONFIG_ENV_SIZE         0x2000
  78 #define CONFIG_ENV_SECT_SIZE    0x12000 /* Total Size of Environment Sector */
  79 #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
  80 #define ENV_IS_EMBEDDED
  81 #else
  82 #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
  83 #endif
  84 #ifdef ENV_IS_EMBEDDED
  85 /* WARNING - the following is hand-optimized to fit within
  86  * the sector before the environment sector. If it throws
  87  * an error during compilation remove an object here to get
  88  * it linked after the configuration sector.
  89  */
  90 # define LDS_BOARD_TEXT \
  91         arch/blackfin/lib/built-in.o (.text*); \
  92         arch/blackfin/cpu/built-in.o (.text*); \
  93         . = DEFINED(env_offset) ? env_offset : .; \
  94         common/env_embedded.o (.text*);
  95 #endif
  96
  97 /*
  98  * I2C Settings
  99  */
 100 #define CONFIG_SYS_I2C
 101 #define CONFIG_SYS_I2C_SOFT             /* I2C bit-banged */
 102 #define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0
 103 #define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1
 104
 105 /*
 106  * Misc Settings
 107  */
 108 #define CONFIG_UART_CONSOLE     0
 109
 110 /*
 111  * Pull in common ADI header for remaining command/environment setup
 112  */
 113 #include <configs/bfin_adi_common.h>
 114
 115 #endif