include/configs/imx31_litekit.h

   1 /*
   2  * (C) Copyright 2004
   3  * Texas Instruments.
   4  * Richard Woodruff <r-woodruff2@ti.com>
   5  * Kshitij Gupta <kshitij@ti.com>
   6  *
   7  * Configuration settings for the LogicPD i.MX31 Litekit board.
   8  *
   9  * See file CREDITS for list of people who contributed to this
  10  * project.
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License as
  14  * published by the Free Software Foundation; either version 2 of
  15  * the License, or (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25  * MA 02111-1307 USA
  26  */
  27
  28 #ifndef __CONFIG_H
  29 #define __CONFIG_H
  30
  31 #include <asm/arch/imx-regs.h>
  32
  33  /* High Level Configuration Options */
  34 #define CONFIG_ARM1136          1    /* This is an arm1136 CPU core */
  35 #define CONFIG_MX31             1    /* in a mx31 */
  36 #define CONFIG_MX31_HCLK_FREQ   26000000
  37 #define CONFIG_MX31_CLK32       32000
  38
  39 #define CONFIG_DISPLAY_CPUINFO
  40 #define CONFIG_DISPLAY_BOARDINFO
  41
  42 /* Temporarily disabled */
  43 #if 0
  44 #define CONFIG_OF_LIBFDT                1
  45 #define CONFIG_FIT                      1
  46 #define CONFIG_FIT_VERBOSE              1
  47 #endif
  48
  49 #define CONFIG_CMDLINE_TAG              1    /* enable passing of ATAGs */
  50 #define CONFIG_SETUP_MEMORY_TAGS        1
  51 #define CONFIG_INITRD_TAG               1
  52
  53 /*
  54  * Size of malloc() pool
  55  */
  56 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 128 * 1024)
  57
  58 /*
  59  * Hardware drivers
  60  */
  61
  62 #define CONFIG_MXC_UART 1
  63 #define CONFIG_SYS_MX31_UART1           1
  64
  65 #define CONFIG_HARD_SPI         1
  66 #define CONFIG_MXC_SPI          1
  67 #define CONFIG_DEFAULT_SPI_BUS  1
  68 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
  69
  70 #define CONFIG_FSL_PMIC
  71 #define CONFIG_FSL_PMIC_BUS     1
  72 #define CONFIG_FSL_PMIC_CS      0
  73 #define CONFIG_FSL_PMIC_CLK     1000000
  74 #define CONFIG_FSL_PMIC_MODE    (SPI_MODE_0 | SPI_CS_HIGH)
  75
  76 #define CONFIG_RTC_MC13783      1
  77
  78 /* allow to overwrite serial and ethaddr */
  79 #define CONFIG_ENV_OVERWRITE
  80 #define CONFIG_CONS_INDEX       1
  81 #define CONFIG_BAUDRATE         115200
  82 #define CONFIG_SYS_BAUDRATE_TABLE       {9600, 19200, 38400, 57600, 115200}
  83
  84 /***********************************************************
  85  * Command definition
  86  ***********************************************************/
  87
  88 #include <config_cmd_default.h>
  89
  90 #define CONFIG_CMD_MII
  91 #define CONFIG_CMD_PING
  92 #define CONFIG_CMD_SPI
  93 #define CONFIG_CMD_DATE
  94 #define CONFIG_CMD_NAND
  95
  96 #define CONFIG_BOOTDELAY        3
  97
  98 #define CONFIG_NETMASK          255.255.255.0
  99 #define CONFIG_IPADDR           192.168.23.168
 100 #define CONFIG_SERVERIP         192.168.23.2
 101
 102 #define CONFIG_EXTRA_ENV_SETTINGS                                                                                       \
 103         "bootargs_base=setenv bootargs console=ttySMX0,115200\0"                                                        \
 104         "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0"      \
 105         "bootcmd=run bootcmd_net\0"                                                                                     \
 106         "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; tftpboot 0x80000000 uImage-mx31; bootm\0"             \
 107         "prg_uboot=tftpboot 0x80000000 u-boot-imx31_litekit.bin; protect off all; erase 0xa00d0000 0xa01effff; cp.b 0x80000000 0xa00d0000 $(filesize)\0"
 108
 109
 110 #define CONFIG_NET_MULTI
 111 #define CONFIG_SMC911X          1
 112 #define CONFIG_SMC911X_BASE     (CS4_BASE + 0x00020000)
 113 #define CONFIG_SMC911X_32_BIT   1
 114
 115 /*
 116  * Miscellaneous configurable options
 117  */
 118 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 119 #define CONFIG_SYS_PROMPT               "uboot> "
 120 #define CONFIG_SYS_CBSIZE               256  /* Console I/O Buffer Size */
 121 /* Print Buffer Size */
 122 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 123 #define CONFIG_SYS_MAXARGS              16          /* max number of command args */
 124 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE  /* Boot Argument Buffer Size */
 125
 126 #define CONFIG_SYS_MEMTEST_START        0  /* memtest works on */
 127 #define CONFIG_SYS_MEMTEST_END          0x10000
 128
 129 #define CONFIG_SYS_LOAD_ADDR            0 /* default load address */
 130
 131 #define CONFIG_SYS_HZ                   1000
 132
 133 #define CONFIG_CMDLINE_EDITING  1
 134
 135 /*-----------------------------------------------------------------------
 136  * Stack sizes
 137  *
 138  * The stack sizes are set up in start.S using the settings below
 139  */
 140 #define CONFIG_STACKSIZE        (128 * 1024) /* regular stack */
 141
 142 /*-----------------------------------------------------------------------
 143  * Physical Memory Map
 144  */
 145 #define CONFIG_NR_DRAM_BANKS    1
 146 #define PHYS_SDRAM_1            CSD0_BASE
 147 #define PHYS_SDRAM_1_SIZE       (128 * 1024 * 1024)
 148
 149 #define CONFIG_SYS_SDRAM_BASE           CSD0_BASE
 150 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
 151 #define CONFIG_SYS_INIT_RAM_SIZE                IRAM_SIZE
 152 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 153 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
 154
 155 /*-----------------------------------------------------------------------
 156  * FLASH and environment organization
 157  */
 158 #define CONFIG_SYS_FLASH_BASE           CS0_BASE
 159 #define CONFIG_SYS_MAX_FLASH_BANKS      1           /* max number of memory banks */
 160 #define CONFIG_SYS_MAX_FLASH_SECT       128          /* max number of sectors on one chip */
 161 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
 162
 163 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x001f0000)
 164 #define CONFIG_ENV_IS_IN_FLASH  1
 165 #define CONFIG_ENV_SECT_SIZE    (64 * 1024)
 166 #define CONFIG_ENV_SIZE         (64 * 1024)
 167
 168 /*-----------------------------------------------------------------------
 169  * CFI FLASH driver setup
 170  */
 171 #define CONFIG_SYS_FLASH_CFI            1       /* Flash memory is CFI compliant */
 172 #define CONFIG_FLASH_CFI_DRIVER 1       /* Use drivers/cfi_flash.c */
 173 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1     /* Use buffered writes (~10x faster) */
 174 #define CONFIG_SYS_FLASH_PROTECTION     1       /* Use hardware sector protection */
 175
 176 /* timeout values are in ticks */
 177 #define CONFIG_SYS_FLASH_ERASE_TOUT     (100*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
 178 #define CONFIG_SYS_FLASH_WRITE_TOUT     (100*CONFIG_SYS_HZ) /* Timeout for Flash Write */
 179
 180 /*
 181  * JFFS2 partitions
 182  */
 183 #undef CONFIG_CMD_MTDPARTS
 184 #define CONFIG_JFFS2_DEV        "nor0"
 185
 186 /*
 187  * NAND flash
 188  */
 189 #define CONFIG_NAND_MXC
 190 #define CONFIG_MXC_NAND_REGS_BASE       NFC_BASE_ADDR
 191 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 192 #define CONFIG_SYS_NAND_BASE            NFC_BASE_ADDR
 193 #define CONFIG_MXC_NAND_HWECC
 194
 195 #endif /* __CONFIG_H */