include/configs/integratorcp.h

   1 /*
   2  * (C) Copyright 2003
   3  * Texas Instruments.
   4  * Kshitij Gupta <kshitij@ti.com>
   5  * Configuation settings for the TI OMAP Innovator board.
   6  *
   7  * (C) Copyright 2004
   8  * ARM Ltd.
   9  * Philippe Robin, <philippe.robin@arm.com>
  10  * Configuration for Compact Integrator board.
  11  *
  12  * See file CREDITS for list of people who contributed to this
  13  * project.
  14  *
  15  * This program is free software; you can redistribute it and/or
  16  * modify it under the terms of the GNU General Public License as
  17  * published by the Free Software Foundation; either version 2 of
  18  * the License, or (at your option) any later version.
  19  *
  20  * This program is distributed in the hope that it will be useful,
  21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  * GNU General Public License for more details.
  24  *
  25  * You should have received a copy of the GNU General Public License
  26  * along with this program; if not, write to the Free Software
  27  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  28  * MA 02111-1307 USA
  29  */
  30
  31 #ifndef __CONFIG_H
  32 #define __CONFIG_H
  33
  34 /*
  35  * High Level Configuration Options
  36  * (easy to change)
  37  */
  38 #define CFG_MEMTEST_START       0x100000
  39 #define CFG_MEMTEST_END         0x10000000
  40 #define CFG_HZ                  1000
  41 #define CFG_HZ_CLOCK            1000000 /* Timer 1 is clocked at 1Mhz */
  42 #define CFG_TIMERBASE           0x13000100
  43
  44 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs  */
  45 #define CONFIG_SETUP_MEMORY_TAGS        1
  46 #define CONFIG_MISC_INIT_R              1       /* call misc_init_r during start up */
  47 /*
  48  * Size of malloc() pool
  49  */
  50 #define CFG_MALLOC_LEN          (CFG_ENV_SIZE + 128*1024)
  51 #define CFG_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
  52
  53 /*
  54  * Hardware drivers
  55  */
  56 #define CONFIG_DRIVER_SMC91111
  57 #define CONFIG_SMC_USE_32_BIT
  58 #define CONFIG_SMC91111_BASE    0xC8000000
  59 #undef CONFIG_SMC91111_EXT_PHY
  60
  61 /*
  62  * NS16550 Configuration
  63  */
  64 #define CFG_PL011_SERIAL
  65 #define CONFIG_PL011_CLOCK      14745600
  66 #define CONFIG_PL01x_PORTS      { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1 }
  67 #define CONFIG_CONS_INDEX       0
  68 #define CONFIG_BAUDRATE         38400
  69 #define CFG_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
  70 #define CFG_SERIAL0             0x16000000
  71 #define CFG_SERIAL1             0x17000000
  72
  73 /*
  74 #define CONFIG_COMMANDS         (CFG_CMD_DFL | CFG_CMD_PCI)
  75 */
  76 #define CONFIG_COMMANDS         (CFG_CMD_DHCP | CFG_CMD_IMI | CFG_CMD_NET | CFG_CMD_PING | \
  77                                  CFG_CMD_BDI | CFG_CMD_MEMORY | CFG_CMD_FLASH | CFG_CMD_ENV \
  78                                 )
  79
  80 /* #define CONFIG_BOOTP_MASK    CONFIG_BOOTP_DEFAULT */
  81
  82 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
  83 #include <cmd_confdefs.h>
  84
  85 #if 0
  86 #define CONFIG_BOOTDELAY        2
  87 #define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0"
  88 #define CONFIG_BOOTCOMMAND "bootp ; bootm"
  89 #endif
  90
  91 /* Flash loaded
  92    - U-Boot
  93    - u-linux
  94    - system.cramfs
  95 */
  96 #define CONFIG_BOOTDELAY        2
  97 #define CONFIG_BOOTARGS "root=/dev/mtdblock2 mem=128M ip=dhcp netdev=27,0, \
  98 0xfc800000,0xfc800010,eth0 video=clcdfb:0"
  99 #define CONFIG_BOOTCOMMAND "cp 0x24040000 0x7fc0 0x80000; bootm"
 100
 101 /*
 102  * Miscellaneous configurable options
 103  */
 104 #define CFG_LONGHELP                            /* undef to save memory     */
 105 #define CFG_PROMPT      "Integrator-CP # "      /* Monitor Command Prompt   */
 106 #define CFG_CBSIZE      256                     /* Console I/O Buffer Size  */
 107 /* Print Buffer Size */
 108 #define CFG_PBSIZE      (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
 109 #define CFG_MAXARGS     16                      /* max number of command args   */
 110 #define CFG_BARGSIZE    CFG_CBSIZE              /* Boot Argument Buffer Size    */
 111
 112 #undef  CFG_CLKS_IN_HZ          /* everything, incl board info, in Hz */
 113 #define CFG_LOAD_ADDR   0x7fc0  /* default load address */
 114
 115 /*-----------------------------------------------------------------------
 116  * Stack sizes
 117  *
 118  * The stack sizes are set up in start.S using the settings below
 119  */
 120 #define CONFIG_STACKSIZE        (128*1024)      /* regular stack */
 121 #ifdef CONFIG_USE_IRQ
 122 #define CONFIG_STACKSIZE_IRQ    (4*1024)        /* IRQ stack */
 123 #define CONFIG_STACKSIZE_FIQ    (4*1024)        /* FIQ stack */
 124 #endif
 125
 126 /*-----------------------------------------------------------------------
 127  * Physical Memory Map
 128  */
 129 #define CONFIG_NR_DRAM_BANKS    1               /* we have 1 bank of DRAM */
 130 #define PHYS_SDRAM_1            0x00000000      /* SDRAM Bank #1 */
 131 #define PHYS_SDRAM_1_SIZE       0x08000000      /* 128 MB */
 132
 133 /*-----------------------------------------------------------------------
 134  * FLASH and environment organization
 135  */
 136 #define CFG_FLASH_BASE          0x24000000
 137 #define CFG_MAX_FLASH_SECT      64
 138 #define CFG_MAX_FLASH_BANKS     1               /* max number of memory banks */
 139 #define PHYS_FLASH_SIZE         0x01000000      /* 16MB */
 140 #define CFG_FLASH_ERASE_TOUT    (2*CFG_HZ)      /* Timeout for Flash Erase */
 141 #define CFG_FLASH_WRITE_TOUT    (2*CFG_HZ)      /* Timeout for Flash Write */
 142
 143 #define CFG_MONITOR_BASE        0x24F40000
 144 #define CFG_ENV_IS_IN_FLASH
 145 #define CFG_ENV_ADDR            0x24F00000
 146 #define CFG_ENV_SECT_SIZE       0x40000         /* 256KB */
 147 #define CFG_ENV_SIZE            8192            /* 8KB */
 148
 149 /*-----------------------------------------------------------------------
 150  * There are various dependencies on the core module (CM) fitted
 151  * Users should refer to their CM user guide
 152  * - when porting adjust u-boot/Makefile accordingly
 153  *   to define the necessary CONFIG_ s for the CM involved
 154  * see e.g. integratorcp_CM926EJ-S_config
 155  */
 156
 157 #define CM_BASE         0x10000000
 158
 159 /* CM registers common to all integrator/CP CMs */
 160 #define OS_CTRL                 0x0000000C
 161 #define CMMASK_REMAP            0x00000005      /* set remap & led           */
 162 #define CMMASK_RESET            0x00000008
 163 #define OS_LOCK                 0x00000014
 164 #define CMVAL_LOCK              0x0000A000      /* locking value             */
 165 #define CMMASK_LOCK             0x0000005F      /* locking value             */
 166 #define CMVAL_UNLOCK            0x00000000      /* any value != CM_LOCKVAL   */
 167 #define OS_SDRAM                0x00000020
 168 #define OS_INIT                 0x00000024
 169 #define CMMASK_MAP_SIMPLE       0xFFFDFFFF      /* simple mapping */
 170 #define CMMASK_TCRAM_DISABLE    0xFFFEFFFF      /* TCRAM disabled */
 171 #define CMMASK_LOWVEC           0x00000004      /* vectors @ 0x00000000 */
 172 #if defined (CONFIG_CM10200E) || defined (CONFIG_CM10220E)
 173 #define CMMASK_INIT_102         0x00000300      /* see CM102xx ref manual
 174                                                  * - PLL test clock bypassed
 175                                                  * - bus clock ratio 2
 176                                                  * - little endian
 177                                                  * - vectors at zero
 178                                                  */
 179 #endif /* CM1022xx */
 180
 181 #define CMMASK_LE               0x00000008      /* little endian */
 182 #define CMMASK_CMxx6_COMMON     0x00000100      /* Common value for CMxx6
 183                                                  * - divisor/ratio b00000001
 184                                                  *                 bx
 185                                                  * - HCLKDIV       b000
 186                                                  *                 bxx
 187                                                  * - PLL BYPASS    b00
 188                                                  */
 189
 190 /* Determine CM characteristics */
 191
 192 #undef  CONFIG_CM_MULTIPLE_SSRAM
 193 #undef  CONFIG_CM_SPD_DETECT
 194 #undef  CONFIG_CM_REMAP
 195 #undef  CONFIG_CM_INIT
 196 #undef  CONFIG_CM_TCRAM
 197
 198 #if defined (CONFIG_CM946E_S) || defined (CONFIG_CM966E_S)
 199 #define CONFIG_CM_MULTIPLE_SSRAM        /* CM has multiple SSRAM mapping */
 200 #endif
 201
 202 #ifndef CONFIG_CM922t_XA10
 203 #define CONFIG_CM_SPD_DETECT                    /* CM supports SPD query      */
 204 #define OS_SPD                  0x00000100      /* Address of SPD data        */
 205 #define CONFIG_CM_REMAP                         /* CM supports remapping      */
 206 #define CONFIG_CM_INIT                          /* CM has initialization reg  */
 207 #endif
 208
 209 #if defined(CONFIG_CM926EJ_S)   || defined (CONFIG_CM946E_S)    || \
 210     defined(CONFIG_CM966E_S)    || defined (CONFIG_CM1026EJ_S)  || \
 211     defined(CONFIG_CM1136JF_S)
 212 #define CONFIG_CM_TCRAM                         /* CM has TCRAM  */
 213 #endif
 214
 215 #endif /* __CONFIG_H */