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flash: complete CONFIG_SYS_NO_FLASH move with renaming
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1 /*
2 * Copyright 2016 Freescale Semiconductor
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7 #ifndef __LS1012A_COMMON_H
8 #define __LS1012A_COMMON_H
9
10 #define CONFIG_FSL_LAYERSCAPE
11 #define CONFIG_GICV2
12
13 #include <asm/arch/config.h>
14
15 #define CONFIG_SUPPORT_RAW_INITRD
16
17 #define CONFIG_DISPLAY_BOARDINFO_LATE
18
19 #define CONFIG_SYS_TEXT_BASE 0x40100000
20
21 #define CONFIG_SYS_CLK_FREQ 125000000
22
23 #define CONFIG_SKIP_LOWLEVEL_INIT
24
25 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
26 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
27
28 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
29 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
30 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
31 #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
32
33 /* Generic Timer Definitions */
34 #define COUNTER_FREQUENCY CONFIG_SYS_CLK_FREQ/4 /* 25MHz */
35
36 /* CSU */
37 #define CONFIG_LAYERSCAPE_NS_ACCESS
38
39 /* Size of malloc() pool */
40 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
41
42 /*SPI device */
43 #ifdef CONFIG_QSPI_BOOT
44 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
45 #define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000
46 #define CONFIG_ENV_SPI_BUS 0
47 #define CONFIG_ENV_SPI_CS 0
48 #define CONFIG_ENV_SPI_MAX_HZ 1000000
49 #define CONFIG_ENV_SPI_MODE 0x03
50 #define CONFIG_SPI_FLASH_SPANSION
51 #define CONFIG_FSL_SPI_INTERFACE
52 #define CONFIG_SF_DATAFLASH
53
54 #define CONFIG_FSL_QSPI
55 #define QSPI0_AMBA_BASE 0x40000000
56 #define CONFIG_SPI_FLASH_SPANSION
57 #define CONFIG_SPI_FLASH_BAR
58
59 #define FSL_QSPI_FLASH_SIZE (1 << 24)
60 #define FSL_QSPI_FLASH_NUM 2
61
62 /*
63 * Environment
64 */
65 #define CONFIG_ENV_OVERWRITE
66
67 #define CONFIG_ENV_IS_IN_SPI_FLASH
68 #define CONFIG_ENV_SIZE 0x40000 /* 256KB */
69 #define CONFIG_ENV_OFFSET 0x200000 /* 2MB */
70 #define CONFIG_ENV_SECT_SIZE 0x40000
71 #endif
72
73 /* I2C */
74 #define CONFIG_SYS_I2C
75 #define CONFIG_SYS_I2C_MXC
76 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
77 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
78
79 #define CONFIG_CONS_INDEX 1
80 #define CONFIG_SYS_NS16550_SERIAL
81 #define CONFIG_SYS_NS16550_REG_SIZE 1
82 #define CONFIG_SYS_NS16550_CLK (get_serial_clock())
83
84 #define CONFIG_BAUDRATE 115200
85 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
86
87 /* Command line configuration */
88 #define CONFIG_CMD_ENV
89 #undef CONFIG_CMD_IMLS
90
91 #define CONFIG_SYS_HZ 1000
92
93 #define CONFIG_HWCONFIG
94 #define HWCONFIG_BUFFER_SIZE 128
95
96 /* Initial environment variables */
97 #define CONFIG_EXTRA_ENV_SETTINGS \
98 "verify=no\0" \
99 "loadaddr=0x80100000\0" \
100 "kernel_addr=0x100000\0" \
101 "fdt_high=0xffffffffffffffff\0" \
102 "initrd_high=0xffffffffffffffff\0" \
103 "kernel_start=0xa00000\0" \
104 "kernel_load=0xa0000000\0" \
105 "kernel_size=0x2800000\0" \
106
107 #define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \
108 "earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
109 #define CONFIG_BOOTCOMMAND "sf probe 0:0; sf read $kernel_load "\
110 "$kernel_start $kernel_size && "\
111 "bootm $kernel_load"
112
113 /* Monitor Command Prompt */
114 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
115 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
116 sizeof(CONFIG_SYS_PROMPT) + 16)
117 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
118 #define CONFIG_SYS_LONGHELP
119 #define CONFIG_CMDLINE_EDITING 1
120 #define CONFIG_AUTO_COMPLETE
121 #define CONFIG_SYS_MAXARGS 64 /* max command args */
122
123 #define CONFIG_PANIC_HANG
124 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
125
126 #include <asm/fsl_secure_boot.h>
127
128 #endif /* __LS1012A_COMMON_H */